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00047 #ifndef _TLV320AIC23B_H_
00048 #define _TLV320AIC23B_H_
00049
00050 #include <limits.h>
00051 #include <stddef.h>
00052
00053 #include "compiler.h"
00054
00055
00058
00059
00060 #define AIC23B_CTRL_INTERFACE_TWI 1
00061 #define AIC23B_CTRL_INTERFACE_SPI 2
00062
00064
00065
00067
00068
00069 #define AIC23B_MODE_DAC 0
00070 #define AIC23B_MODE_ADC 1
00071 #define AIC23B_MODE_CODEC 3
00072
00074
00075
00077
00078
00079 #define AIC23B_INPUT_LINE 0
00080 #define AIC23B_INPUT_MIC 1
00081
00083
00084 #include "conf_tlv320aic23b.h"
00085
00086
00089
00090
00091 #define AIC23B_CTRL_SIZE (AIC23B_CTRL_ADDR_SIZE + AIC23B_CTRL_DATA_SIZE)
00092 #define AIC23B_CTRL_ADDR_OFFSET 9
00093 #define AIC23B_CTRL_ADDR_SIZE 7
00094 #define AIC23B_CTRL_DATA_OFFSET 0
00095 #define AIC23B_CTRL_DATA_SIZE 9
00096
00098 typedef struct
00099 {
00100 const U16 addr : AIC23B_CTRL_ADDR_SIZE;
00101 U16 data : AIC23B_CTRL_DATA_SIZE;
00102 } aic23b_ctrl_t;
00103
00105
00106
00109
00110
00111 #define AIC23B_LLICVC 0x00
00112 #define AIC23B_LLICVC_ADDRESS 0x00
00113 #define AIC23B_LLICVC_DEFAULT 0x0097
00114 #define AIC23B_LLICVC_LRS_OFFSET 8
00115 #define AIC23B_LLICVC_LRS_SIZE 1
00116 #define AIC23B_LLICVC_LIM_OFFSET 7
00117 #define AIC23B_LLICVC_LIM_SIZE 1
00118 #define AIC23B_LLICVC_LIV_OFFSET 0
00119 #define AIC23B_LLICVC_LIV_SIZE 5
00120
00122 typedef union
00123 {
00124 struct
00125 {
00126 const U16 addr : AIC23B_CTRL_ADDR_SIZE;
00127 U16 data : AIC23B_CTRL_DATA_SIZE;
00128 };
00129 struct
00130 {
00131 const U16 : AIC23B_CTRL_ADDR_SIZE;
00132 U16 lrs : AIC23B_LLICVC_LRS_SIZE;
00133 U16 lim : AIC23B_LLICVC_LIM_SIZE;
00134 U16 : 2;
00135 U16 liv : AIC23B_LLICVC_LIV_SIZE;
00136 };
00137 } aic23b_llicvc_t;
00138
00140
00141
00144
00145
00146 #define AIC23B_RLICVC 0x01
00147 #define AIC23B_RLICVC_ADDRESS 0x01
00148 #define AIC23B_RLICVC_DEFAULT 0x0097
00149 #define AIC23B_RLICVC_RLS_OFFSET 8
00150 #define AIC23B_RLICVC_RLS_SIZE 1
00151 #define AIC23B_RLICVC_RIM_OFFSET 7
00152 #define AIC23B_RLICVC_RIM_SIZE 1
00153 #define AIC23B_RLICVC_RIV_OFFSET 0
00154 #define AIC23B_RLICVC_RIV_SIZE 5
00155
00157 typedef union
00158 {
00159 struct
00160 {
00161 const U16 addr : AIC23B_CTRL_ADDR_SIZE;
00162 U16 data : AIC23B_CTRL_DATA_SIZE;
00163 };
00164 struct
00165 {
00166 const U16 : AIC23B_CTRL_ADDR_SIZE;
00167 U16 rls : AIC23B_RLICVC_RLS_SIZE;
00168 U16 rim : AIC23B_RLICVC_RIM_SIZE;
00169 U16 : 2;
00170 U16 riv : AIC23B_RLICVC_RIV_SIZE;
00171 };
00172 } aic23b_rlicvc_t;
00173
00175
00176
00179
00180
00181 #define AIC23B_LCHVC 0x02
00182 #define AIC23B_LCHVC_ADDRESS 0x02
00183 #define AIC23B_LCHVC_DEFAULT 0x00F9
00184 #define AIC23B_LCHVC_LRS_OFFSET 8
00185 #define AIC23B_LCHVC_LRS_SIZE 1
00186 #define AIC23B_LCHVC_LZC_OFFSET 7
00187 #define AIC23B_LCHVC_LZC_SIZE 1
00188 #define AIC23B_LCHVC_LHV_OFFSET 0
00189 #define AIC23B_LCHVC_LHV_SIZE 7
00190
00192 typedef union
00193 {
00194 struct
00195 {
00196 const U16 addr : AIC23B_CTRL_ADDR_SIZE;
00197 U16 data : AIC23B_CTRL_DATA_SIZE;
00198 };
00199 struct
00200 {
00201 const U16 : AIC23B_CTRL_ADDR_SIZE;
00202 U16 lrs : AIC23B_LCHVC_LRS_SIZE;
00203 U16 lzc : AIC23B_LCHVC_LZC_SIZE;
00204 U16 lhv : AIC23B_LCHVC_LHV_SIZE;
00205 };
00206 } aic23b_lchvc_t;
00207
00209
00210
00213
00214
00215 #define AIC23B_RCHVC 0x03
00216 #define AIC23B_RCHVC_ADDRESS 0x03
00217 #define AIC23B_RCHVC_DEFAULT 0x00F9
00218 #define AIC23B_RCHVC_RLS_OFFSET 8
00219 #define AIC23B_RCHVC_RLS_SIZE 1
00220 #define AIC23B_RCHVC_RZC_OFFSET 7
00221 #define AIC23B_RCHVC_RZC_SIZE 1
00222 #define AIC23B_RCHVC_RHV_OFFSET 0
00223 #define AIC23B_RCHVC_RHV_SIZE 7
00224
00226 typedef union
00227 {
00228 struct
00229 {
00230 const U16 addr : AIC23B_CTRL_ADDR_SIZE;
00231 U16 data : AIC23B_CTRL_DATA_SIZE;
00232 };
00233 struct
00234 {
00235 const U16 : AIC23B_CTRL_ADDR_SIZE;
00236 U16 rls : AIC23B_RCHVC_RLS_SIZE;
00237 U16 rzc : AIC23B_RCHVC_RZC_SIZE;
00238 U16 rhv : AIC23B_RCHVC_RHV_SIZE;
00239 };
00240 } aic23b_rchvc_t;
00241
00243
00244
00247
00248
00249 #define AIC23B_AAPC 0x04
00250 #define AIC23B_AAPC_ADDRESS 0x04
00251 #define AIC23B_AAPC_DEFAULT 0x000A
00252 #define AIC23B_AAPC_STA_OFFSET 6
00253 #define AIC23B_AAPC_STA_SIZE 3
00254 #define AIC23B_AAPC_STA_M18DB 0x0003
00255 #define AIC23B_AAPC_STA_M12DB 0x0002
00256 #define AIC23B_AAPC_STA_M9DB 0x0001
00257 #define AIC23B_AAPC_STA_M6DB 0x0000
00258 #define AIC23B_AAPC_STA_0DB 0x0004
00259 #define AIC23B_AAPC_STE_OFFSET 5
00260 #define AIC23B_AAPC_STE_SIZE 1
00261 #define AIC23B_AAPC_DAC_OFFSET 4
00262 #define AIC23B_AAPC_DAC_SIZE 1
00263 #define AIC23B_AAPC_BYP_OFFSET 3
00264 #define AIC23B_AAPC_BYP_SIZE 1
00265 #define AIC23B_AAPC_INSEL_OFFSET 2
00266 #define AIC23B_AAPC_INSEL_SIZE 1
00267 #define AIC23B_AAPC_INSEL_LINE 0x0000
00268 #define AIC23B_AAPC_INSEL_MIC 0x0001
00269 #define AIC23B_AAPC_MICM_OFFSET 1
00270 #define AIC23B_AAPC_MICM_SIZE 1
00271 #define AIC23B_AAPC_MICB_OFFSET 0
00272 #define AIC23B_AAPC_MICB_SIZE 1
00273
00275 typedef union
00276 {
00277 struct
00278 {
00279 const U16 addr : AIC23B_CTRL_ADDR_SIZE;
00280 U16 data : AIC23B_CTRL_DATA_SIZE;
00281 };
00282 struct
00283 {
00284 const U16 : AIC23B_CTRL_ADDR_SIZE;
00285 U16 sta : AIC23B_AAPC_STA_SIZE;
00286 U16 ste : AIC23B_AAPC_STE_SIZE;
00287 U16 dac : AIC23B_AAPC_DAC_SIZE;
00288 U16 byp : AIC23B_AAPC_BYP_SIZE;
00289 U16 insel : AIC23B_AAPC_INSEL_SIZE;
00290 U16 micm : AIC23B_AAPC_MICM_SIZE;
00291 U16 micb : AIC23B_AAPC_MICB_SIZE;
00292 };
00293 } aic23b_aapc_t;
00294
00296
00297
00300
00301
00302 #define AIC23B_DAPC 0x05
00303 #define AIC23B_DAPC_ADDRESS 0x05
00304 #define AIC23B_DAPC_DEFAULT 0x0008
00305 #define AIC23B_DAPC_DACM_OFFSET 3
00306 #define AIC23B_DAPC_DACM_SIZE 1
00307 #define AIC23B_DAPC_DEEMP_OFFSET 1
00308 #define AIC23B_DAPC_DEEMP_SIZE 2
00309 #define AIC23B_DAPC_DEEMP_NONE 0x0000
00310 #define AIC23B_DAPC_DEEMP_32KHZ 0x0001
00311 #define AIC23B_DAPC_DEEMP_44_1KHZ 0x0002
00312 #define AIC23B_DAPC_DEEMP_48KHZ 0x0003
00313 #define AIC23B_DAPC_ADCHP_OFFSET 0
00314 #define AIC23B_DAPC_ADCHP_SIZE 1
00315
00317 typedef union
00318 {
00319 struct
00320 {
00321 const U16 addr : AIC23B_CTRL_ADDR_SIZE;
00322 U16 data : AIC23B_CTRL_DATA_SIZE;
00323 };
00324 struct
00325 {
00326 const U16 : AIC23B_CTRL_ADDR_SIZE;
00327 U16 : 5;
00328 U16 dacm : AIC23B_DAPC_DACM_SIZE;
00329 U16 deemp : AIC23B_DAPC_DEEMP_SIZE;
00330 U16 adchp : AIC23B_DAPC_ADCHP_SIZE;
00331 };
00332 } aic23b_dapc_t;
00333
00335
00336
00339
00340
00341 #define AIC23B_PDC 0x06
00342 #define AIC23B_PDC_ADDRESS 0x06
00343 #define AIC23B_PDC_DEFAULT 0x0007
00344 #define AIC23B_PDC_OFF_OFFSET 7
00345 #define AIC23B_PDC_OFF_SIZE 1
00346 #define AIC23B_PDC_CLK_OFFSET 6
00347 #define AIC23B_PDC_CLK_SIZE 1
00348 #define AIC23B_PDC_OSC_OFFSET 5
00349 #define AIC23B_PDC_OSC_SIZE 1
00350 #define AIC23B_PDC_OUT_OFFSET 4
00351 #define AIC23B_PDC_OUT_SIZE 1
00352 #define AIC23B_PDC_DAC_OFFSET 3
00353 #define AIC23B_PDC_DAC_SIZE 1
00354 #define AIC23B_PDC_ADC_OFFSET 2
00355 #define AIC23B_PDC_ADC_SIZE 1
00356 #define AIC23B_PDC_MIC_OFFSET 1
00357 #define AIC23B_PDC_MIC_SIZE 1
00358 #define AIC23B_PDC_LINE_OFFSET 0
00359 #define AIC23B_PDC_LINE_SIZE 1
00360
00362 typedef union
00363 {
00364 struct
00365 {
00366 const U16 addr : AIC23B_CTRL_ADDR_SIZE;
00367 U16 data : AIC23B_CTRL_DATA_SIZE;
00368 };
00369 struct
00370 {
00371 const U16 : AIC23B_CTRL_ADDR_SIZE;
00372 U16 : 1;
00373 U16 off : AIC23B_PDC_OFF_SIZE;
00374 U16 clk : AIC23B_PDC_CLK_SIZE;
00375 U16 osc : AIC23B_PDC_OSC_SIZE;
00376 U16 out : AIC23B_PDC_OUT_SIZE;
00377 U16 dac : AIC23B_PDC_DAC_SIZE;
00378 U16 adc : AIC23B_PDC_ADC_SIZE;
00379 U16 mic : AIC23B_PDC_MIC_SIZE;
00380 U16 line : AIC23B_PDC_LINE_SIZE;
00381 };
00382 } aic23b_pdc_t;
00383
00385
00386
00389
00390
00391 #define AIC23B_DAIF 0x07
00392 #define AIC23B_DAIF_ADDRESS 0x07
00393 #define AIC23B_DAIF_DEFAULT 0x0001
00394 #define AIC23B_DAIF_MS_OFFSET 6
00395 #define AIC23B_DAIF_MS_SIZE 1
00396 #define AIC23B_DAIF_MS_SLAVE 0x0000
00397 #define AIC23B_DAIF_MS_MASTER 0x0001
00398 #define AIC23B_DAIF_LRSWAP_OFFSET 5
00399 #define AIC23B_DAIF_LRSWAP_SIZE 1
00400 #define AIC23B_DAIF_LRP_OFFSET 4
00401 #define AIC23B_DAIF_LRP_SIZE 1
00402 #define AIC23B_DAIF_IWL_OFFSET 2
00403 #define AIC23B_DAIF_IWL_SIZE 2
00404 #define AIC23B_DAIF_IWL_16 0x0000
00405 #define AIC23B_DAIF_IWL_20 0x0001
00406 #define AIC23B_DAIF_IWL_24 0x0002
00407 #define AIC23B_DAIF_IWL_32 0x0003
00408 #define AIC23B_DAIF_FMT_OFFSET 0
00409 #define AIC23B_DAIF_FMT_SIZE 2
00410 #define AIC23B_DAIF_FMT_RA 0x0000
00411 #define AIC23B_DAIF_FMT_LA 0x0001
00412 #define AIC23B_DAIF_FMT_I2S 0x0002
00413 #define AIC23B_DAIF_FMT_DSP 0x0003
00414
00416 typedef union
00417 {
00418 struct
00419 {
00420 const U16 addr : AIC23B_CTRL_ADDR_SIZE;
00421 U16 data : AIC23B_CTRL_DATA_SIZE;
00422 };
00423 struct
00424 {
00425 const U16 : AIC23B_CTRL_ADDR_SIZE;
00426 U16 : 2;
00427 U16 ms : AIC23B_DAIF_MS_SIZE;
00428 U16 lrswap : AIC23B_DAIF_LRSWAP_SIZE;
00429 U16 lrp : AIC23B_DAIF_LRP_SIZE;
00430 U16 iwl : AIC23B_DAIF_IWL_SIZE;
00431 U16 fmt : AIC23B_DAIF_FMT_SIZE;
00432 };
00433 } aic23b_daif_t;
00434
00436
00437
00440
00441
00442 #define AIC23B_SRC 0x08
00443 #define AIC23B_SRC_ADDRESS 0x08
00444 #define AIC23B_SRC_DEFAULT 0x0020
00445 #define AIC23B_SRC_CLKOUT_OFFSET 7
00446 #define AIC23B_SRC_CLKOUT_SIZE 1
00447 #define AIC23B_SRC_CLKIN_OFFSET 6
00448 #define AIC23B_SRC_CLKIN_SIZE 1
00449 #define AIC23B_SRC_SR_OFFSET 2
00450 #define AIC23B_SRC_SR_SIZE 4
00451 #define AIC23B_SRC_BOSR_OFFSET 1
00452 #define AIC23B_SRC_BOSR_SIZE 1
00453 #define AIC23B_SRC_USB_OFFSET 0
00454 #define AIC23B_SRC_USB_SIZE 1
00455
00457 typedef union
00458 {
00459 struct
00460 {
00461 const U16 addr : AIC23B_CTRL_ADDR_SIZE;
00462 U16 data : AIC23B_CTRL_DATA_SIZE;
00463 };
00464 struct
00465 {
00466 const U16 : AIC23B_CTRL_ADDR_SIZE;
00467 U16 : 1;
00468 U16 clkout : AIC23B_SRC_CLKOUT_SIZE;
00469 U16 clkin : AIC23B_SRC_CLKIN_SIZE;
00470 U16 sr : AIC23B_SRC_SR_SIZE;
00471 U16 bosr : AIC23B_SRC_BOSR_SIZE;
00472 U16 usb : AIC23B_SRC_USB_SIZE;
00473 };
00474 } aic23b_src_t;
00475
00477
00478
00481
00482
00483 #define AIC23B_DIA 0x09
00484 #define AIC23B_DIA_ADDRESS 0x09
00485 #define AIC23B_DIA_DEFAULT 0x0000
00486 #define AIC23B_DIA_ACT_OFFSET 0
00487 #define AIC23B_DIA_ACT_SIZE 1
00488
00490 typedef union
00491 {
00492 struct
00493 {
00494 const U16 addr : AIC23B_CTRL_ADDR_SIZE;
00495 U16 data : AIC23B_CTRL_DATA_SIZE;
00496 };
00497 struct
00498 {
00499 const U16 : AIC23B_CTRL_ADDR_SIZE;
00500 U16 : 8;
00501 U16 act : AIC23B_DIA_ACT_SIZE;
00502 };
00503 } aic23b_dia_t;
00504
00506
00507
00510
00511
00512 #define AIC23B_RR 0x0A
00513 #define AIC23B_RR_ADDRESS 0x0F
00514 #define AIC23B_RR_DEFAULT 0x0000
00515 #define AIC23B_RR_RES_OFFSET 0
00516 #define AIC23B_RR_RES_SIZE 9
00517
00519 typedef union
00520 {
00521 struct
00522 {
00523 const U16 addr : AIC23B_CTRL_ADDR_SIZE;
00524 U16 data : AIC23B_CTRL_DATA_SIZE;
00525 };
00526 struct
00527 {
00528 const U16 : AIC23B_CTRL_ADDR_SIZE;
00529 U16 res : AIC23B_RR_RES_SIZE;
00530 };
00531 } aic23b_rr_t;
00532
00534
00535
00538
00539
00541 #define AIC23B_ADDRESS(REG) \
00542 REG##_ADDRESS
00543
00545 #define AIC23B_DEFAULT(REG) \
00546 REG##_DEFAULT
00547
00550 #define AIC23B_OFFSET(REG, BITFIELD) \
00551 REG##_##BITFIELD##_OFFSET
00552
00555 #define AIC23B_SIZE(REG, BITFIELD) \
00556 REG##_##BITFIELD##_SIZE
00557
00560 #define AIC23B_MASK(REG, BITFIELD) \
00561 (((1 << REG##_##BITFIELD##_SIZE) - 1) << REG##_##BITFIELD##_OFFSET)
00562
00564
00565
00568
00569
00570 #define AIC23B_LEFT_CHANNEL 0x01
00571 #define AIC23B_RIGHT_CHANNEL 0x02
00572
00574
00575
00578
00579
00580 #define AIC23B_MUTED SCHAR_MIN
00581 #define AIC23B_LIN_VOL_OFFSET 0x17
00582 #define AIC23B_LIN_VOL_MIN ((S8)(-34.5 * 2 / 3))
00583 #define AIC23B_LIN_VOL_MAX ((S8)(+12 * 2 / 3))
00584 #define AIC23B_HP_VOL_OFFSET 0x79
00585 #define AIC23B_HP_VOL_MIN ((S8)(-72)) // -72dB
00586 #define AIC23B_HP_VOL_MAX ((S8)(+ 6)) // +6dB
00587
00589
00590
00593
00594
00597 extern U16 aic23b_read_reg(U8 reg);
00598
00601 extern void aic23b_write_reg(U8 reg, U16 val);
00602
00604
00605
00608
00609
00612 extern S8 aic23b_get_line_in_volume(U8 ch);
00613
00616 extern void aic23b_set_line_in_volume(U8 ch_mask, S8 vol);
00617
00620 extern U8 aic23b_dac_get_average_headphone_volume(void);
00621
00624 extern void aic23b_dac_set_average_headphone_volume(U8 volume);
00625
00628 extern Bool aic23b_dac_is_headphone_volume_muted(void);
00629
00632 extern Bool aic23b_dac_is_headphone_volume_boosted(void);
00633
00636 extern S8 aic23b_get_headphone_volume(U8 ch);
00637
00641 extern void aic23b_set_headphone_volume(U8 ch_mask, S8 vol, Bool z_cross);
00642
00645 extern aic23b_aapc_t aic23b_get_analog_audio_path(void);
00646
00649 extern void aic23b_set_analog_audio_path(aic23b_aapc_t aapc);
00650
00653 extern aic23b_dapc_t aic23b_get_digital_audio_path(void);
00654
00657 extern void aic23b_set_digital_audio_path(aic23b_dapc_t dapc);
00658
00661 extern aic23b_pdc_t aic23b_get_power_down_state(void);
00662
00665 extern void aic23b_set_power_down_state(aic23b_pdc_t pdc);
00666
00669 extern Bool aic23b_is_dig_audio_activated(void);
00670
00674 extern void aic23b_activate_dig_audio(Bool act);
00675
00678 extern void aic23b_reset(void);
00679
00682 extern void aic23b_configure_freq(int master_clock_hz, int sample_rate_hz);
00683
00685
00686
00689
00690
00693 extern void aic23b_dac_start(U32 sample_rate_hz,
00694 U8 num_channels,
00695 U8 bits_per_sample,
00696 Bool swap_channels,
00697 void (*callback)(U32 arg),
00698 U32 callback_opt,
00699 U32 pba_hz);
00700
00705 extern void aic23b_dac_setup(U32 sample_rate_hz,
00706 U8 num_channels,
00707 U8 bits_per_sample,
00708 Bool swap_channels,
00709 void (*callback)(U32 arg),
00710 U32 callback_opt,
00711 U32 pba_hz);
00712
00717 extern Bool aic23b_dac_output(void *sample_buffer, size_t sample_length);
00718
00723 extern void aic23b_dac_increase_volume(void);
00724
00729 extern void aic23b_dac_decrease_volume(void);
00730
00733 extern void aic23b_dac_flush(void);
00734
00737 extern void aic23b_dac_stop(void);
00738
00739
00742 extern void aic23b_adc_start(U32 sample_rate_hz,
00743 U8 num_channels,
00744 U8 bits_per_sample,
00745 Bool swap_channels,
00746 void (*callback)(U32 arg),
00747 U32 callback_opt,
00748 U32 pba_hz);
00749
00754 extern void aic23b_adc_setup(U32 sample_rate_hz,
00755 U8 num_channels,
00756 U8 bits_per_sample,
00757 Bool swap_channels,
00758 void (*callback)(U32 arg),
00759 U32 callback_opt,
00760 U32 pba_hz);
00761
00766 extern Bool aic23b_adc_input(void *sample_buffer, size_t sample_length);
00767
00770 extern void aic23b_adc_flush(void);
00771
00774 extern void aic23b_adc_stop(void);
00775
00778 extern void aic23b_codec_start(U32 sample_rate_hz,
00779 U8 num_channels,
00780 U8 bits_per_sample,
00781 Bool swap_channels,
00782 void (*callback)(U32 arg),
00783 U32 callback_opt,
00784 U32 pba_hz);
00785
00790 extern void aic23b_codec_setup(U32 sample_rate_hz,
00791 U8 num_channels,
00792 U8 bits_per_sample,
00793 Bool swap_channels,
00794 void (*callback)(U32 arg),
00795 U32 callback_opt,
00796 U32 pba_hz);
00797
00800 extern void aic23b_codec_flush(void);
00801
00804 extern void aic23b_codec_stop(void);
00805
00808 extern void aic23b_dac_mute(Bool mute);
00809
00811
00812
00813 #endif // _TLV320AIC23B_H_