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00072 #include "preprocessor.h"
00073 #include "compiler.h"
00074 #include "board.h"
00075 #include "pm.h"
00076 #include "rtc.h"
00077 #include "cycle_counter.h"
00078 #include "flashc.h"
00079 #include "conf_usb.h"
00080 #include "usb_drv.h"
00081 #include "usb_task.h"
00082 #if USB_DEVICE_FEATURE == ENABLED
00083 #include "usb_dfu.h"
00084 #endif
00085 #include "conf_isp.h"
00086 #include "isp.h"
00087 #include "autobaud.h"
00088
00089
00090
00091
00092
00093
00094
00095 #if (defined __GNUC__) && ((defined __AVR32_UC3A364__) || \
00096 (defined __AVR32_UC3A364S__) || \
00097 (defined __AVR32_UC3A3128__) || \
00098 (defined __AVR32_UC3A3128S__) || \
00099 (defined __AVR32_UC3A3256__) || \
00100 (defined __AVR32_UC3A3256S__))|| \
00101 (defined __ICCAVR32__) && ((defined __AT32UC3A364__) || \
00102 (defined __AT32UC3A364S__) || \
00103 (defined __AT32UC3A3128__) || \
00104 (defined __AT32UC3A3128S__) || \
00105 (defined __AT32UC3A3256__) || \
00106 (defined __AT32UC3A3256S__))
00107 #define TC (&AVR32_TC0)
00108 #else
00109 #define TC (&AVR32_TC)
00110 #endif
00111 #define PM (&AVR32_PM)
00112 #define TC_32KHZ_CHANNEL 0
00113
00114 void wait_10_ms(void)
00115 {
00116 Set_system_register(AVR32_COUNT, 0);
00117 while ((U32)Get_system_register(AVR32_COUNT) < (FRCOSC * 10 + 999) / 1000);
00118 }
00119
00120 static void osc_rtc_counter_reset(void)
00121 {
00122 rtc_set_value(&AVR32_RTC, 0);
00123 }
00124
00125 static int osc_rtc_counter_value(void)
00126 {
00127 return rtc_get_value(&AVR32_RTC) * 2;
00128 }
00129
00130 static void osc_isp_counter_reset(void)
00131 {
00132 Set_sys_count(0);
00133 }
00134
00135 static int osc_isp_counter_value(void)
00136 {
00137 return Get_sys_count();
00138 }
00139
00143 void sys_clk_gen_start(void)
00144 {
00145 int cpu_freq_hz, mul;
00146 const int freq_hz[] = { 8000000, 12000000, 16000000 };
00147 const struct autobaud_cfg_osc_cmp_t autobaud_cfg = {
00148 .osc_ref_freq_hz = 115000,
00149 .osc_ref_counter_reset = osc_rtc_counter_reset,
00150 .osc_ref_counter_value = osc_rtc_counter_value,
00151 .osc_target_counter_reset = osc_isp_counter_reset,
00152 .osc_target_counter_value = osc_isp_counter_value,
00153 .convergence_rate = 10000
00154 };
00155 const struct autobaud_matching_freq_t match_freq = {
00156 .freq_hz = freq_hz,
00157 .nb_entries = sizeof(freq_hz)/sizeof(freq_hz[0])
00158 };
00159 Bool sav_glob_int_en;
00160
00161 #define MAX_OSC_FREQ 16000000
00162
00163
00164
00165
00166
00167 pm_switch_to_osc0(&AVR32_PM, MAX_OSC_FREQ, ATPASTE3(AVR32_PM_OSCCTRL, ISP_OSC, _STARTUP_16384_RCOSC));
00168
00169
00170 rtc_init(&AVR32_RTC, RTC_OSC_RC, 0);
00171 rtc_enable(&AVR32_RTC);
00172
00173
00174 if (!(cpu_freq_hz = autobaud_detect_osc_cmp(&autobaud_cfg)))
00175 cpu_freq_hz = 12000000;
00176 cpu_freq_hz = autobaud_match_frequency(cpu_freq_hz, &match_freq);
00177
00178 switch (cpu_freq_hz)
00179 {
00180 case 8000000:
00181 mul = 5;
00182 break;
00183 case 12000000:
00184 mul = 3;
00185 break;
00186 case 16000000:
00187 mul = 2;
00188 break;
00189 default:
00190 mul = 3;
00191 }
00192
00193 Usb_freeze_clock();
00194
00195
00196 pm_pll_setup(PM, 0,
00197 mul,
00198 0,
00199 ISP_OSC,
00200 63);
00201
00202 if ((sav_glob_int_en = Is_global_interrupt_enabled())) Disable_global_interrupt();
00203
00204
00205 pm_pll_set_option(PM, 0,
00206 1,
00207 1,
00208 0);
00209
00210
00211 pm_pll_enable(PM, 0);
00212
00213
00214 pm_wait_for_pll0_locked(PM);
00215
00216
00217 pm_gc_setup(PM, AVR32_PM_GCLK_USBB,
00218 1,
00219 0,
00220 #if (defined __GNUC__) && ((defined __AVR32_UC3A364__) || \
00221 (defined __AVR32_UC3A364S__) || \
00222 (defined __AVR32_UC3A3128__) || \
00223 (defined __AVR32_UC3A3128S__) || \
00224 (defined __AVR32_UC3A3256__) || \
00225 (defined __AVR32_UC3A3256S__))|| \
00226 (defined __ICCAVR32__) && ((defined __AT32UC3A364__) || \
00227 (defined __AT32UC3A364S__) || \
00228 (defined __AT32UC3A3128__) || \
00229 (defined __AT32UC3A3128S__) || \
00230 (defined __AT32UC3A3256__) || \
00231 (defined __AT32UC3A3256S__))
00232 1,
00233 1);
00234 #else
00235 0,
00236 0);
00237 #endif
00238
00239
00240 pm_gc_enable(PM, AVR32_PM_GCLK_USBB);
00241
00242 Usb_unfreeze_clock();
00243
00244
00245 flashc_set_wait_state(1);
00246
00247
00248 pm_switch_to_clock(PM, AVR32_PM_MCCTRL_MCSEL_PLL0);
00249
00250
00251
00252
00253 pm_cksel(PM, 1,
00254 1,
00255 1,
00256 1,
00257 1,
00258 1);
00259
00260
00261 flashc_set_wait_state(0);
00262
00263 Usb_ack_sof();
00264
00265 if (sav_glob_int_en) Enable_global_interrupt();
00266 }
00267
00268
00272 void sys_clk_gen_stop(void)
00273 {
00274 volatile avr32_pm_t *const pm = &AVR32_PM;
00275
00276 pm_gc_disable(pm, AVR32_PM_GCLK_USBB);
00277 pm_gc_setup(pm, AVR32_PM_GCLK_USBB, 0, 0, 0, 0);
00278 flashc_set_wait_state(1);
00279 pm_cksel(pm, 0, 0, 0, 0, 0, 0);
00280 pm_switch_to_clock(pm, AVR32_PM_MCCTRL_MCSEL_SLOW);
00281 flashc_set_wait_state(0);
00282 pm_pll_disable(pm, 0);
00283 pm_pll_set_option(pm, 0, 0, 0, 0);
00284 pm_pll_setup(pm, 0, 0, 0, 0, 0);
00285 pm_enable_clk_no_wait(pm, ATPASTE3(AVR32_PM_OSCCTRL, ISP_OSC, _STARTUP_0_RCOSC));
00286 pm_disable_clk(pm);
00287 pm_enable_osc_ext_clock(pm);
00288 }
00289
00290
00291 int main(void)
00292 {
00293 wait_10_ms();
00294
00295 Usb_force_full_speed_mode();
00296 usb_task_init();
00297 #if USB_DEVICE_FEATURE == ENABLED
00298 usb_dfu_init();
00299 #endif
00300
00301 while (TRUE)
00302 {
00303 usb_task();
00304 }
00305 }