00001
00099 #include "board.h"
00100 #include "gpio.h"
00101
00102 #if (( defined (__GNUC__) && ( defined (__AVR32_UC3L016__) || defined (__AVR32_UC3L032__) || defined (__AVR32_UC3L064__))) \
00103 ||(defined (__ICCAVR32__) && (defined (__AT32UC3L016__) || defined (__AT32UC3L032__) || defined (__AT32UC3L064__) )))
00104
00105
00106
00107 #include "scif_uc3l.h"
00108 #include "pm_uc3l.h"
00109 #include "flashcdw.h"
00110 #elif ( defined (__GNUC__) && ( defined (__AVR32_UC3C064C__) || defined (__AVR32_UC3C0128C__) || defined (__AVR32_UC3C0256C__) || defined (__AVR32_UC3C0512CREVC__) || defined (__AVR32_UC3C164C__) || defined (__AVR32_UC3C1128C__) || defined (__AVR32_UC3C1256C__) || defined (__AVR32_UC3C1512CREVC__) || defined (__AVR32_UC3C264C__) || defined (__AVR32_UC3C2128C__) || defined (__AVR32_UC3C2256C__) || defined (__AVR32_UC3C2512CREVC__))) \
00111 ||( defined (__ICCAVR32__) && ( defined (__AT32UC3C064C__) || defined (__AT32UC3C0128C__) || defined (__AT32UC3C0256C__) || defined (__AT32UC3C0512C__) || defined (__AT32UC3C164C__) || defined (__AT32UC3C1128C__) || defined (__AT32UC3C1256C__) || defined (__AT32UC3C1512C__) || defined (__AT32UC3C264C__) || defined (__AT32UC3C2128C__) || defined (__AT32UC3C2256C__) || defined (__AT32UC3C2512C__)))
00112
00113
00114
00115 #include "pm_uc3c.h"
00116 #include "scif_uc3c.h"
00117 #include "flashc.h"
00118 #else
00119 #include "pm.h"
00120 #include "flashc.h"
00121 #endif
00122 #include "board.h"
00123
00124
00127
00128 #if BOARD == EVK1100
00129 # define EXAMPLE_GCLK_ID 0
00130 # define EXAMPLE_GCLK_PIN AVR32_PM_GCLK_0_1_PIN
00131 # define EXAMPLE_GCLK_FUNCTION AVR32_PM_GCLK_0_1_FUNCTION
00132
00133 #elif BOARD == EVK1105
00134 # define EXAMPLE_GCLK_ID 2
00135 # define EXAMPLE_GCLK_PIN AVR32_PM_GCLK_2_1_PIN
00136 # define EXAMPLE_GCLK_FUNCTION AVR32_PM_GCLK_2_1_FUNCTION
00137
00138
00139 #elif BOARD == EVK1101
00140 # define EXAMPLE_GCLK_ID 2
00141 # define EXAMPLE_GCLK_PIN AVR32_PM_GCLK_2_PIN
00142 # define EXAMPLE_GCLK_FUNCTION AVR32_PM_GCLK_2_FUNCTION
00143
00144 #elif BOARD == EVK1104
00145 # define EXAMPLE_GCLK_ID 1
00146 # define EXAMPLE_GCLK_PIN AVR32_PM_GCLK_1_0_PIN
00147 # define EXAMPLE_GCLK_FUNCTION AVR32_PM_GCLK_1_0_FUNCTION
00148
00149 #elif BOARD == STK600_RCUC3L0 || BOARD == UC3L_EK
00150 # define EXAMPLE_GCLK_ID AVR32_SCIF_GCLK_DFLL0_SSG
00151 # define EXAMPLE_GCLK_PIN AVR32_SCIF_GCLK_1_0_PIN
00152 # define EXAMPLE_GCLK_FUNCTION AVR32_SCIF_GCLK_1_0_FUNCTION
00153 # define EXAMPLE_CPUCLK_HZ (48000000UL)
00154
00155
00156 # define EXAMPLE_DFLL_COARSE_FDFLL96 150
00157 # define EXAMPLE_DFLL_FINE_FDFLL96 65
00158 #elif BOARD == UC3C_EK
00159 # define EXAMPLE_GCLK_ID AVR32_SCIF_GCLK_GCLK9
00160 # define EXAMPLE_GCLK_PIN AVR32_SCIF_GCLK_0_2_PIN
00161 # define EXAMPLE_GCLK_FUNCTION AVR32_SCIF_GCLK_0_2_FUNCTION
00162
00163 #endif
00164
00165 #if !defined(EXAMPLE_GCLK_ID) || \
00166 !defined(EXAMPLE_GCLK_PIN) || \
00167 !defined(EXAMPLE_GCLK_FUNCTION)
00168 # error The generic clock configuration to use in this example is missing.
00169 #endif
00171
00172
00173
00174
00175
00176
00177 static void local_start_highfreq_clock(void)
00178 {
00179 #if BOARD == STK600_RCUC3L0 || BOARD == UC3L_EK
00180 scif_dfll_openloop_conf_t dfllconfig = {EXAMPLE_DFLL_FINE_FDFLL96, EXAMPLE_DFLL_COARSE_FDFLL96};
00181
00182
00183 scif_dfll0_openloop_start(&dfllconfig);
00184
00185
00186
00187 flashcdw_set_flash_waitstate_and_readmode(EXAMPLE_CPUCLK_HZ);
00188
00189
00190 pm_set_clk_domain_div((pm_clk_domain_t)AVR32_PM_CLK_GRP_CPU, PM_CKSEL_DIVRATIO_2);
00191
00192
00193 pm_set_clk_domain_div((pm_clk_domain_t)AVR32_PM_CLK_GRP_PBA, PM_CKSEL_DIVRATIO_4);
00194
00195
00196 pm_set_clk_domain_div((pm_clk_domain_t)AVR32_PM_CLK_GRP_PBB, PM_CKSEL_DIVRATIO_2);
00197
00198
00199 pm_set_mclk_source(PM_CLK_SRC_DFLL0);
00200 #elif BOARD == UC3C_EK
00201
00202 scif_pll_opt_t opt;
00203
00204
00205 scif_configure_osc_crystalmode(SCIF_OSC0, FOSC0);
00206
00207
00208 scif_enable_osc(SCIF_OSC0, OSC0_STARTUP, true);
00209
00210
00211 pm_set_mclk_source(PM_CLK_SRC_OSC0);
00212
00213 opt.osc = SCIF_OSC0;
00214 opt.lockcount = 16;
00215 opt.div = 1;
00216 opt.mul = 5;
00217 opt.pll_div2 = 1;
00218 opt.pll_wbwdisable = 0;
00219 opt.pll_freq = 1;
00220
00221 scif_pll_setup(SCIF_PLL0, opt);
00222
00223
00224 scif_pll_enable(SCIF_PLL0);
00225
00226
00227 scif_wait_for_pll_locked(SCIF_PLL0) ;
00228
00229
00230
00231
00232
00233
00234
00235
00236
00237 pm_set_clk_domain_div(PM_CLK_DOMAIN_2, (pm_divratio_t) 0);
00238
00239
00240
00241 flashc_set_wait_state(1);
00242
00243
00244 pm_set_mclk_source(PM_CLK_SRC_PLL0);
00245
00246 #else
00247 volatile avr32_pm_t* pm = &AVR32_PM;
00248
00249
00250 pm_switch_to_osc0(pm, FOSC0, OSC0_STARTUP);
00251
00252
00253
00254
00255
00256
00257
00258
00259
00260 pm_pll_setup(pm,
00261 0,
00262 7,
00263 1,
00264 0,
00265 16);
00266
00267
00268
00269
00270
00271
00272
00273
00274
00275
00276 pm_pll_set_option(pm, 0, 1, 1, 0);
00277
00278
00279
00280
00281
00282
00283 pm_pll_enable(pm,0);
00284
00285
00286 pm_wait_for_pll0_locked(pm) ;
00287
00288
00289
00290
00291
00292
00293
00294
00295
00296 pm_cksel(pm, 1, 0, 0, 0, 0, 0);
00297
00298
00299
00300 flashc_set_wait_state(1);
00301
00302 pm_switch_to_clock(pm, AVR32_PM_MCSEL_PLL0);
00303 #endif
00304 }
00305
00306
00307
00308
00309
00310 static void local_start_gc(void)
00311 {
00312 #if BOARD == STK600_RCUC3L0 || BOARD == UC3L_EK
00313
00314
00315
00316
00317
00318 scif_gc_setup(EXAMPLE_GCLK_ID, SCIF_GCCTRL_DFLL0, AVR32_GC_DIV_CLOCK, 2);
00319
00320
00321 scif_gc_enable(EXAMPLE_GCLK_ID);
00322 #elif BOARD == UC3C_EK
00323
00324
00325
00326 scif_gc_setup(EXAMPLE_GCLK_ID, SCIF_GCCTRL_PLL0, AVR32_SCIF_GC_NO_DIV_CLOCK, 0);
00327
00328
00329 scif_gc_enable(EXAMPLE_GCLK_ID);
00330 #else
00331 volatile avr32_pm_t* pm = &AVR32_PM;
00332
00333
00334
00335
00336
00337
00338
00339
00340
00341 pm_gc_setup(pm,
00342 EXAMPLE_GCLK_ID,
00343 1,
00344 0,
00345 0,
00346 0);
00347
00348
00349 pm_gc_enable(pm, EXAMPLE_GCLK_ID);
00350 #endif
00351
00352 gpio_enable_module_pin(EXAMPLE_GCLK_PIN, EXAMPLE_GCLK_FUNCTION);
00353 }
00354
00355
00356
00357
00358 static void software_delay(void)
00359 {
00360 volatile int i;
00361 for (i=0; i<1000000; i++);
00362 }
00363
00364
00365
00366
00367
00368
00369
00370
00371
00372
00373 int main(void)
00374 {
00375
00376 local_start_highfreq_clock();
00377
00378
00379 local_start_gc();
00380
00381
00382 while(1)
00383 {
00384 gpio_tgl_gpio_pin(LED0_GPIO);
00385 software_delay();
00386 }
00387 }