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00048 #include "gpio.h"
00049
00050
00052 #define GPIO AVR32_GPIO
00053
00054
00057
00058
00059
00060 int gpio_enable_module(const gpio_map_t gpiomap, unsigned int size)
00061 {
00062 int status = GPIO_SUCCESS;
00063 unsigned int i;
00064
00065 for (i = 0; i < size; i++)
00066 {
00067 status |= gpio_enable_module_pin(gpiomap->pin, gpiomap->function);
00068 gpiomap++;
00069 }
00070
00071 return status;
00072 }
00073
00074
00075 int gpio_enable_module_pin(unsigned int pin, unsigned int function)
00076 {
00077 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
00078
00079
00080 switch (function)
00081 {
00082 case 0:
00083 gpio_port->pmr0c = 1 << (pin & 0x1F);
00084 gpio_port->pmr1c = 1 << (pin & 0x1F);
00085 #if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
00086 gpio_port->pmr2c = 1 << (pin & 0x1F);
00087 #endif
00088 break;
00089
00090 case 1:
00091 gpio_port->pmr0s = 1 << (pin & 0x1F);
00092 gpio_port->pmr1c = 1 << (pin & 0x1F);
00093 #if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
00094 gpio_port->pmr2c = 1 << (pin & 0x1F);
00095 #endif
00096 break;
00097
00098 case 2:
00099 gpio_port->pmr0c = 1 << (pin & 0x1F);
00100 gpio_port->pmr1s = 1 << (pin & 0x1F);
00101 #if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
00102 gpio_port->pmr2c = 1 << (pin & 0x1F);
00103 #endif
00104 break;
00105
00106 case 3:
00107 gpio_port->pmr0s = 1 << (pin & 0x1F);
00108 gpio_port->pmr1s = 1 << (pin & 0x1F);
00109 #if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
00110 gpio_port->pmr2c = 1 << (pin & 0x1F);
00111 #endif
00112 break;
00113
00114 #if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
00115 case 4:
00116 gpio_port->pmr0c = 1 << (pin & 0x1F);
00117 gpio_port->pmr1c = 1 << (pin & 0x1F);
00118 gpio_port->pmr2s = 1 << (pin & 0x1F);
00119 break;
00120
00121 case 5:
00122 gpio_port->pmr0s = 1 << (pin & 0x1F);
00123 gpio_port->pmr1c = 1 << (pin & 0x1F);
00124 gpio_port->pmr2s = 1 << (pin & 0x1F);
00125 break;
00126
00127 case 6:
00128 gpio_port->pmr0c = 1 << (pin & 0x1F);
00129 gpio_port->pmr1s = 1 << (pin & 0x1F);
00130 gpio_port->pmr2s = 1 << (pin & 0x1F);
00131 break;
00132
00133 case 7:
00134 gpio_port->pmr0s = 1 << (pin & 0x1F);
00135 gpio_port->pmr1s = 1 << (pin & 0x1F);
00136 gpio_port->pmr2s = 1 << (pin & 0x1F);
00137 break;
00138 #endif
00139
00140 default:
00141 return GPIO_INVALID_ARGUMENT;
00142 }
00143
00144
00145 gpio_port->gperc = 1 << (pin & 0x1F);
00146
00147 return GPIO_SUCCESS;
00148 }
00149
00150
00151 void gpio_enable_gpio(const gpio_map_t gpiomap, unsigned int size)
00152 {
00153 unsigned int i;
00154
00155 for (i = 0; i < size; i++)
00156 {
00157 gpio_enable_gpio_pin(gpiomap->pin);
00158 gpiomap++;
00159 }
00160 }
00161
00162
00163 void gpio_enable_gpio_pin(unsigned int pin)
00164 {
00165 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
00166 gpio_port->oderc = 1 << (pin & 0x1F);
00167 gpio_port->gpers = 1 << (pin & 0x1F);
00168 }
00169
00170
00171
00172
00173
00174
00175
00176
00177
00178 #if 0
00179
00180
00181 void gpio_enable_pin_open_drain(unsigned int pin)
00182 {
00183 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
00184 gpio_port->odmers = 1 << (pin & 0x1F);
00185 }
00186
00187
00188 void gpio_disable_pin_open_drain(unsigned int pin)
00189 {
00190 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
00191 gpio_port->odmerc = 1 << (pin & 0x1F);
00192 }
00193
00194
00195 #endif
00196
00197
00198 void gpio_enable_pin_pull_up(unsigned int pin)
00199 {
00200 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
00201 gpio_port->puers = 1 << (pin & 0x1F);
00202 #if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
00203 gpio_port->pderc = 1 << (pin & 0x1F);
00204 #endif
00205 }
00206
00207
00208 void gpio_disable_pin_pull_up(unsigned int pin)
00209 {
00210 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
00211 gpio_port->puerc = 1 << (pin & 0x1F);
00212 }
00213
00214 #if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
00215
00216
00221 void gpio_enable_pin_pull_down(unsigned int pin)
00222 {
00223 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
00224 gpio_port->puerc = 1 << (pin & 0x1F);
00225 gpio_port->pders = 1 << (pin & 0x1F);
00226 }
00227
00232 void gpio_disable_pin_pull_down(unsigned int pin)
00233 {
00234 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
00235 gpio_port->pderc = 1 << (pin & 0x1F);
00236 }
00237
00242 void gpio_enable_pin_buskeeper(unsigned int pin)
00243 {
00244 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
00245 gpio_port->puers = 1 << (pin & 0x1F);
00246 gpio_port->pders = 1 << (pin & 0x1F);
00247 }
00248
00253 void gpio_disable_pin_buskeeper(unsigned int pin)
00254 {
00255 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
00256 gpio_port->puerc = 1 << (pin & 0x1F);
00257 gpio_port->pderc = 1 << (pin & 0x1F);
00258 }
00259
00260 #endif
00261
00262 int gpio_get_pin_value(unsigned int pin)
00263 {
00264 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
00265 return (gpio_port->pvr >> (pin & 0x1F)) & 1;
00266 }
00267
00268
00269 int gpio_get_gpio_pin_output_value(unsigned int pin)
00270 {
00271 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
00272 return (gpio_port->ovr >> (pin & 0x1F)) & 1;
00273 }
00274
00275
00276 int gpio_get_gpio_open_drain_pin_output_value(unsigned int pin)
00277 {
00278 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
00279 return ((gpio_port->oder >> (pin & 0x1F)) & 1) ^ 1;
00280 }
00281
00282
00283 void gpio_set_gpio_pin(unsigned int pin)
00284 {
00285 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
00286
00287 gpio_port->ovrs = 1 << (pin & 0x1F);
00288 gpio_port->oders = 1 << (pin & 0x1F);
00289 gpio_port->gpers = 1 << (pin & 0x1F);
00290 }
00291
00292
00293 void gpio_clr_gpio_pin(unsigned int pin)
00294 {
00295 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
00296
00297 gpio_port->ovrc = 1 << (pin & 0x1F);
00298 gpio_port->oders = 1 << (pin & 0x1F);
00299 gpio_port->gpers = 1 << (pin & 0x1F);
00300 }
00301
00302
00303 void gpio_tgl_gpio_pin(unsigned int pin)
00304 {
00305 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
00306
00307 gpio_port->ovrt = 1 << (pin & 0x1F);
00308 gpio_port->oders = 1 << (pin & 0x1F);
00309 gpio_port->gpers = 1 << (pin & 0x1F);
00310 }
00311
00312
00313 void gpio_set_gpio_open_drain_pin(unsigned int pin)
00314 {
00315 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
00316
00317 gpio_port->oderc = 1 << (pin & 0x1F);
00318 gpio_port->gpers = 1 << (pin & 0x1F);
00319 }
00320
00321
00322 void gpio_clr_gpio_open_drain_pin(unsigned int pin)
00323 {
00324 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
00325
00326 gpio_port->ovrc = 1 << (pin & 0x1F);
00327 gpio_port->oders = 1 << (pin & 0x1F);
00328 gpio_port->gpers = 1 << (pin & 0x1F);
00329 }
00330
00331
00332 void gpio_tgl_gpio_open_drain_pin(unsigned int pin)
00333 {
00334 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
00335
00336 gpio_port->ovrc = 1 << (pin & 0x1F);
00337 gpio_port->odert = 1 << (pin & 0x1F);
00338 gpio_port->gpers = 1 << (pin & 0x1F);
00339 }
00340
00341
00342 void gpio_enable_pin_glitch_filter(unsigned int pin)
00343 {
00344 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
00345 gpio_port->gfers = 1 << (pin & 0x1F);
00346 }
00347
00348
00349 void gpio_disable_pin_glitch_filter(unsigned int pin)
00350 {
00351 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
00352 gpio_port->gferc = 1 << (pin & 0x1F);
00353 }
00354
00363 static int gpio_configure_edge_detector(unsigned int pin, unsigned int mode)
00364 {
00365 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
00366
00367
00368 switch (mode)
00369 {
00370 case GPIO_PIN_CHANGE:
00371 gpio_port->imr0c = 1 << (pin & 0x1F);
00372 gpio_port->imr1c = 1 << (pin & 0x1F);
00373 break;
00374
00375 case GPIO_RISING_EDGE:
00376 gpio_port->imr0s = 1 << (pin & 0x1F);
00377 gpio_port->imr1c = 1 << (pin & 0x1F);
00378 break;
00379
00380 case GPIO_FALLING_EDGE:
00381 gpio_port->imr0c = 1 << (pin & 0x1F);
00382 gpio_port->imr1s = 1 << (pin & 0x1F);
00383 break;
00384
00385 default:
00386 return GPIO_INVALID_ARGUMENT;
00387 }
00388
00389 return GPIO_SUCCESS;
00390 }
00391
00392
00393 int gpio_enable_pin_interrupt(unsigned int pin, unsigned int mode)
00394 {
00395 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
00396
00397
00398 gpio_port->gfers = 1 << (pin & 0x1F);
00399
00400
00401 if(GPIO_INVALID_ARGUMENT == gpio_configure_edge_detector(pin, mode))
00402 return(GPIO_INVALID_ARGUMENT);
00403
00404
00405 gpio_port->iers = 1 << (pin & 0x1F);
00406
00407 return GPIO_SUCCESS;
00408 }
00409
00410
00411 void gpio_disable_pin_interrupt(unsigned int pin)
00412 {
00413 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
00414 gpio_port->ierc = 1 << (pin & 0x1F);
00415 }
00416
00417
00418 int gpio_get_pin_interrupt_flag(unsigned int pin)
00419 {
00420 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
00421 return (gpio_port->ifr >> (pin & 0x1F)) & 1;
00422 }
00423
00424
00425 void gpio_clear_pin_interrupt_flag(unsigned int pin)
00426 {
00427 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
00428 gpio_port->ifrc = 1 << (pin & 0x1F);
00429 }
00430
00431
00432
00433
00434
00435 #if (((defined __GNUC__) && ((defined __AVR32_UC3L016__) || (defined __AVR32_UC3L032__) || (defined __AVR32_UC3L064__))) \
00436 ||((defined __ICCAVR32__) && ((defined __AT32UC3L016__) || (defined __AT32UC3L032__) || (defined __AT32UC3L064__) )))
00437
00438 int gpio_configure_pin_periph_event_mode(unsigned int pin, unsigned int mode, unsigned int use_igf)
00439 {
00440 volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
00441
00442 if(TRUE == use_igf)
00443 {
00444
00445 gpio_port->gfers = 1 << (pin & 0x1F);
00446 }
00447 else
00448 {
00449
00450 gpio_port->gferc = 1 << (pin & 0x1F);
00451 }
00452
00453
00454 return(gpio_configure_edge_detector(pin, mode));
00455 }
00456
00457 #endif
00458