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00051 #include "spi_at32ap7000.h"
00052
00053 int getBaudDiv(spi_options_t * options, int cpuHz);
00054
00055
00060 void spi_reset(volatile avr32_spi_t * spi)
00061 {
00062 spi->cr = AVR32_SPI_CR_SWRST_MASK;
00063 }
00064
00065
00076 int spi_initSlave(volatile avr32_spi_t * spi,
00077 unsigned char bits,
00078 unsigned char spi_mode)
00079 {
00080
00081 spi->cr = (1<<AVR32_SPI_CR_SWRST_OFFSET);
00082
00083
00084
00085 if (bits > 16 || bits < 8) {
00086 return SPI_ERROR_ARGUMENT;
00087 }
00088
00089 spi->csr0 = (bits - 8) << AVR32_SPI_CSR0_BITS_OFFSET;
00090
00091 switch(spi_mode) {
00092 case 0:
00093 spi->csr0 |= (1 << AVR32_SPI_CSR0_NCPHA_OFFSET);
00094 case 1:
00095 break;
00096 case 2:
00097 spi->csr0 |= (1<<AVR32_SPI_CSR0_NCPHA_OFFSET);
00098 case 3:
00099 spi->csr0 |= (1<<AVR32_SPI_CSR0_CPOL_OFFSET);
00100 break;
00101 default:
00102 return SPI_ERROR_ARGUMENT;
00103 }
00104
00105 return SPI_OK;
00106 }
00107
00108
00117 int spi_initTest(volatile avr32_spi_t * spi)
00118 {
00119
00120 spi->cr = (1<<AVR32_SPI_CR_SWRST_OFFSET);
00121
00122 spi->mr |= (1<<AVR32_SPI_MR_MSTR_OFFSET);
00123
00124 spi->mr |= (1<<AVR32_SPI_MR_LLB_OFFSET);
00125
00126 return SPI_OK;
00127 }
00128
00129
00139 int spi_initMaster(volatile avr32_spi_t * spi, spi_options_t * options)
00140 {
00141 if (options->modfdis > 1) {
00142 return SPI_ERROR_ARGUMENT;
00143 }
00144
00145 if (options->fdiv > 1) {
00146 return SPI_ERROR_ARGUMENT;
00147 }
00148
00149
00150 spi->cr = AVR32_SPI_CR_SWRST_MASK;
00151
00152
00153 spi->mr = AVR32_SPI_MR_MSTR_MASK|
00154 (options->fdiv<<AVR32_SPI_MR_FDIV_OFFSET)|
00155 (options->modfdis<<AVR32_SPI_MR_MODFDIS_OFFSET);
00156
00157 return SPI_OK;
00158 }
00159
00160
00174 int spi_selectionMode(volatile avr32_spi_t * spi,
00175 unsigned char variable_ps,
00176 unsigned char pcs_decode,
00177 unsigned char delay)
00178 {
00179 if (variable_ps > 1) {
00180 return SPI_ERROR_ARGUMENT;
00181 }
00182
00183 if (pcs_decode > 1) {
00184 return SPI_ERROR_ARGUMENT;
00185 }
00186
00187 spi->mr |=
00188 (variable_ps<<AVR32_SPI_MR_PS_OFFSET)|
00189 (pcs_decode<<AVR32_SPI_MR_PCSDEC_OFFSET)|
00190 (delay<<AVR32_SPI_MR_DLYBCS_OFFSET);
00191
00192 return SPI_OK;
00193 }
00194
00195
00206 int spi_selectChip(volatile avr32_spi_t * spi, unsigned char chip)
00207 {
00208
00209 spi->mr |= (0xF << AVR32_SPI_MR_PCS_OFFSET);
00210
00211 if ((spi->mr & (1<<AVR32_SPI_MR_PCSDEC_OFFSET)) != 0) {
00212
00213 if (chip > 15) {
00214 return SPI_ERROR_ARGUMENT;
00215 }
00216
00217 spi->mr |= chip << AVR32_SPI_MR_PCS_OFFSET;
00218 } else {
00219 if (chip > 3) {
00220 return SPI_ERROR_ARGUMENT;
00221 }
00222
00223 spi->mr &= ~(1<<(AVR32_SPI_MR_PCS_OFFSET + chip));
00224 }
00225
00226 return SPI_OK;
00227 }
00228
00229
00244 int spi_setupChipReg(volatile avr32_spi_t * spi,
00245 spi_options_t * options,
00246 unsigned int cpuHz)
00247 {
00248 unsigned long csr;
00249
00250 if (options->bits > 16 || options->bits < 8) {
00251 return SPI_ERROR_ARGUMENT;
00252 }
00253
00254 if (options->stay_act > 1) {
00255 return SPI_ERROR_ARGUMENT;
00256 }
00257
00258 int baudDiv = getBaudDiv(options, cpuHz);
00259
00260 if (baudDiv < 0) {
00261 return -baudDiv;
00262 }
00263
00264
00265 csr = ((options->bits - 8)<<AVR32_SPI_CSR0_BITS_OFFSET)|
00266 (baudDiv<<AVR32_SPI_CSR0_SCBR_OFFSET)|
00267 (options->spck_delay<<AVR32_SPI_CSR0_DLYBS_OFFSET)|
00268 (options->trans_delay<<AVR32_SPI_CSR0_DLYBCT_OFFSET)|
00269 (options->stay_act<<AVR32_SPI_CSR0_CSAAT_OFFSET);
00270
00271 switch(options->spi_mode) {
00272 case 0:
00273 csr |= (1<<AVR32_SPI_CSR0_NCPHA_OFFSET);
00274 case 1:
00275 break;
00276 case 2:
00277 csr |= (1<<AVR32_SPI_CSR0_NCPHA_OFFSET);
00278 case 3:
00279 csr |= (1<<AVR32_SPI_CSR0_CPOL_OFFSET);
00280 break;
00281 default:
00282 return SPI_ERROR_ARGUMENT;
00283 }
00284
00285 switch(options->reg) {
00286 case 0:
00287 spi->csr0 = csr;
00288 break;
00289 case 1:
00290 spi->csr1 = csr;
00291 break;
00292 case 2:
00293 spi->csr2 = csr;
00294 break;
00295 case 3:
00296 spi->csr3 = csr;
00297 break;
00298 default:
00299 return SPI_ERROR_ARGUMENT;
00300 }
00301
00302 return SPI_OK;
00303 }
00304
00305
00312 void spi_enable(volatile avr32_spi_t * spi)
00313 {
00314 spi->cr = (1<<AVR32_SPI_CR_SPIEN_OFFSET);
00315 }
00316
00317
00325 void spi_disable(volatile avr32_spi_t * spi)
00326 {
00327 spi->cr = (1<<AVR32_SPI_CR_SPIDIS_OFFSET);
00328 }
00329
00330
00341 int spi_write(volatile avr32_spi_t * spi, unsigned short data)
00342 {
00343 unsigned int timeout = SPI_TIMEOUT;
00344
00345 while ((spi->sr & AVR32_SPI_SR_TXEMPTY_MASK) == 0 && timeout > 0) {
00346 --timeout;
00347 }
00348
00349 if (timeout == 0) {
00350 return SPI_ERROR_TIMEOUT;
00351 }
00352
00353 spi->tdr = data & 0x0000FFFF;
00354
00355 return SPI_OK;
00356 }
00357
00358
00376 int spi_variableSlaveWrite(volatile avr32_spi_t * spi, unsigned short data,
00377 unsigned char pcs, unsigned char lastxfer)
00378 {
00379 unsigned int timeout = SPI_TIMEOUT;
00380
00381 if (pcs > 15 || lastxfer > 1)
00382 return SPI_ERROR_ARGUMENT;
00383
00384 while ((spi->sr & AVR32_SPI_SR_TXEMPTY_MASK) == 0 && --timeout) {
00385 }
00386
00387 if (timeout == 0) {
00388 return SPI_ERROR_TIMEOUT;
00389 }
00390
00391 spi->tdr = (data << AVR32_SPI_TDR_TD_OFFSET) |
00392 (pcs << AVR32_SPI_TDR_PCS_OFFSET) |
00393 (lastxfer << AVR32_SPI_TDR_LASTXFER_OFFSET);
00394
00395 return SPI_OK;
00396 }
00397
00398
00407 unsigned char spi_readRegisterFullCheck(volatile avr32_spi_t * spi)
00408 {
00409 if ((spi->sr & AVR32_SPI_SR_RDRF_MASK) != 0) {
00410 return 1;
00411 } else {
00412 return 0;
00413 }
00414 }
00415
00416
00427 int spi_read(volatile avr32_spi_t * spi, unsigned short * data)
00428 {
00429 unsigned int timeout = SPI_TIMEOUT;
00430
00431 do {
00432 --timeout;
00433 } while ((spi->sr & AVR32_SPI_SR_RDRF_MASK) == 0 && timeout > 0);
00434
00435 if (timeout == 0) {
00436 return SPI_ERROR_TIMEOUT;
00437 }
00438
00439 *data = spi->rdr & 0x0000FFFF;
00440
00441 return SPI_OK;
00442 }
00443
00444
00457 unsigned char spi_getStatus(volatile avr32_spi_t * spi)
00458 {
00459 unsigned char ret = 0;
00460
00461 if ((spi->sr & (1<<AVR32_SPI_SR_OVRES_OFFSET)) != 0) {
00462 ret = SPI_ERROR_OVERRUN;
00463 }
00464
00465 if ((spi->sr & (1<<AVR32_SPI_SR_MODF_OFFSET)) != 0) {
00466 ret += SPI_ERROR_MODE_FAULT;
00467 }
00468
00469 if (ret == (SPI_ERROR_OVERRUN + SPI_ERROR_MODE_FAULT)) {
00470 return SPI_ERROR_OVERRUN_AND_MODE_FAULT;
00471 }
00472 else if (ret > 0) {
00473 return ret;
00474 } else {
00475 return SPI_OK;
00476 }
00477 }
00478
00479
00489 int getBaudDiv(spi_options_t * options, int cpuHz) {
00490 int baudDiv = 0;
00491
00492 if (options->fdiv == 0) {
00493 baudDiv = cpuHz / (options->baudrate);
00494 } else {
00495 baudDiv = cpuHz / (32 * options->baudrate);
00496 }
00497
00498 if (baudDiv > 255 || baudDiv <= 0) {
00499 return -SPI_ERROR_ARGUMENT;
00500 }
00501
00502 return baudDiv;
00503 }
00504