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00047 #include <stddef.h>
00048 #include <string.h>
00049
00050 #include "compiler.h"
00051 #include "audio.h"
00052 #include "tlv320aic23b.h"
00053
00054 #include <avr32/io.h>
00055 #include "intc.h"
00056 #include "gpio.h"
00057 #if AIC23B_CTRL_INTERFACE == AIC23B_CTRL_INTERFACE_TWI
00058 #if AIC23B_TWI_ADDRESS != 0x1A && AIC23B_TWI_ADDRESS != 0x1B
00059 #error TLV320AIC23B: Invalid TWI address selected!
00060 #endif
00061 #include "twi.h"
00062 #elif AIC23B_CTRL_INTERFACE == AIC23B_CTRL_INTERFACE_SPI
00063 #include "spi.h"
00064 #else
00065 #error TLV320AIC23B: Invalid control interface selected!
00066 #endif
00067 #include "ssc_i2s.h"
00068 #include "pdca.h"
00069 #include "cycle_counter.h"
00070 #include "cs2200.h"
00071 #include "audio_example.h"
00072
00073
00075 #define AIC23B_REG_COUNT (sizeof(aic23b_ctrl) / sizeof(aic23b_ctrl[0]))
00076
00078 #define AIC23B_CTRL_RESET \
00079 { \
00080 { \
00081 .addr = AIC23B_ADDRESS(AIC23B_LLICVC), \
00082 .data = AIC23B_DEFAULT(AIC23B_LLICVC) \
00083 }, \
00084 { \
00085 .addr = AIC23B_ADDRESS(AIC23B_RLICVC), \
00086 .data = AIC23B_DEFAULT(AIC23B_RLICVC) \
00087 }, \
00088 { \
00089 .addr = AIC23B_ADDRESS(AIC23B_LCHVC), \
00090 .data = AIC23B_DEFAULT(AIC23B_LCHVC) \
00091 }, \
00092 { \
00093 .addr = AIC23B_ADDRESS(AIC23B_RCHVC), \
00094 .data = AIC23B_DEFAULT(AIC23B_RCHVC) \
00095 }, \
00096 { \
00097 .addr = AIC23B_ADDRESS(AIC23B_AAPC), \
00098 .data = AIC23B_DEFAULT(AIC23B_AAPC) \
00099 }, \
00100 { \
00101 .addr = AIC23B_ADDRESS(AIC23B_DAPC), \
00102 .data = AIC23B_DEFAULT(AIC23B_DAPC) \
00103 }, \
00104 { \
00105 .addr = AIC23B_ADDRESS(AIC23B_PDC), \
00106 .data = AIC23B_DEFAULT(AIC23B_PDC) \
00107 }, \
00108 { \
00109 .addr = AIC23B_ADDRESS(AIC23B_DAIF), \
00110 .data = AIC23B_DEFAULT(AIC23B_DAIF) \
00111 }, \
00112 { \
00113 .addr = AIC23B_ADDRESS(AIC23B_SRC), \
00114 .data = AIC23B_DEFAULT(AIC23B_SRC) \
00115 }, \
00116 { \
00117 .addr = AIC23B_ADDRESS(AIC23B_DIA), \
00118 .data = AIC23B_DEFAULT(AIC23B_DIA) \
00119 }, \
00120 { \
00121 .addr = AIC23B_ADDRESS(AIC23B_RR), \
00122 .data = AIC23B_DEFAULT(AIC23B_RR) \
00123 } \
00124 }
00125
00126
00128 #if (AIC23B_MODE==AIC23B_MODE_CODEC)
00129 static const gpio_map_t AIC23B_SSC_CODEC_GPIO_MAP =
00130 {
00131 {AIC23B_SSC_TX_CLOCK_PIN, AIC23B_SSC_TX_CLOCK_FUNCTION },
00132 {AIC23B_SSC_TX_DATA_PIN, AIC23B_SSC_TX_DATA_FUNCTION },
00133 {AIC23B_SSC_TX_FRAME_SYNC_PIN, AIC23B_SSC_TX_FRAME_SYNC_FUNCTION },
00134 {AIC23B_SSC_RX_DATA_PIN, AIC23B_SSC_RX_DATA_FUNCTION },
00135 {AIC23B_SSC_RX_FRAME_SYNC_PIN, AIC23B_SSC_RX_FRAME_SYNC_FUNCTION }
00136 };
00137 #elif (AIC23B_MODE==AIC23B_MODE_ADC)
00138 static const gpio_map_t AIC23B_SSC_ADC_GPIO_MAP =
00139 {
00140 {AIC23B_SSC_TX_CLOCK_PIN, AIC23B_SSC_TX_CLOCK_FUNCTION },
00141 {AIC23B_SSC_RX_DATA_PIN, AIC23B_SSC_RX_DATA_FUNCTION },
00142 {AIC23B_SSC_RX_FRAME_SYNC_PIN, AIC23B_SSC_RX_FRAME_SYNC_FUNCTION }
00143 };
00144 #elif (AIC23B_MODE==AIC23B_MODE_DAC)
00145 static const gpio_map_t AIC23B_SSC_DAC_GPIO_MAP =
00146 {
00147 #if defined(AIC23B_DAC_USE_RX_CLOCK) && AIC23B_DAC_USE_RX_CLOCK == ENABLED
00148 {AVR32_SSC_RX_CLOCK_0_PIN, AVR32_SSC_RX_CLOCK_0_FUNCTION },
00149 #endif
00150 {AIC23B_SSC_TX_CLOCK_PIN, AIC23B_SSC_TX_CLOCK_FUNCTION },
00151 {AIC23B_SSC_TX_DATA_PIN, AIC23B_SSC_TX_DATA_FUNCTION },
00152 {AIC23B_SSC_TX_FRAME_SYNC_PIN, AIC23B_SSC_TX_FRAME_SYNC_FUNCTION }
00153 };
00154 #else
00155 #error No Mode defined in file 'conf_tlv320aic23b.h'
00156 #endif
00157
00159 static const aic23b_ctrl_t aic23b_ctrl_reset[] = AIC23B_CTRL_RESET;
00160
00162 static aic23b_ctrl_t aic23b_ctrl[] = AIC23B_CTRL_RESET;
00163
00165 extern U32 usb_stream_resync_frequency;
00166
00168 static struct
00169 {
00170 U8 num_channels;
00171 void (*callback)(U32 arg);
00172 U32 callback_opt;
00173 } aic23b_output_params =
00174 {
00175 .num_channels = 0,
00176 .callback = NULL,
00177 .callback_opt = 0
00178 };
00179
00180
00183 #if (AIC23B_MODE==AIC23B_MODE_CODEC)||(AIC23B_MODE==AIC23B_MODE_DAC)
00184 #if (defined __GNUC__) && (defined __AVR32__)
00185 __attribute__((__interrupt__))
00186 #elif (defined __ICCAVR32__)
00187 __interrupt
00188 #endif
00189 static void aic23b_ssc_tx_pdca_int_handler(void)
00190 {
00191 if (pdca_get_transfer_status(AIC23B_SSC_TX_PDCA_CHANNEL) & PDCA_TRANSFER_COMPLETE)
00192 {
00193 pdca_disable_interrupt_transfer_complete(AIC23B_SSC_TX_PDCA_CHANNEL);
00194 if (aic23b_output_params.callback_opt & AUDIO_DAC_OUT_OF_SAMPLE_CB)
00195 aic23b_output_params.callback(AUDIO_DAC_OUT_OF_SAMPLE_CB);
00196 }
00197
00198 if (pdca_get_transfer_status(AIC23B_SSC_TX_PDCA_CHANNEL) & PDCA_TRANSFER_COUNTER_RELOAD_IS_ZERO)
00199 {
00200 pdca_disable_interrupt_reload_counter_zero(AIC23B_SSC_TX_PDCA_CHANNEL);
00201 if (aic23b_output_params.callback_opt & AUDIO_DAC_RELOAD_CB)
00202 aic23b_output_params.callback(AUDIO_DAC_RELOAD_CB);
00203 }
00204 }
00205 #endif
00206
00207
00210 #if (AIC23B_MODE==AIC23B_MODE_CODEC)||(AIC23B_MODE==AIC23B_MODE_ADC)
00211 #if (defined __GNUC__) && (defined __AVR32__)
00212 __attribute__((__interrupt__))
00213 #elif (defined __ICCAVR32__)
00214 __interrupt
00215 #endif
00216 static void aic23b_ssc_rx_pdca_int_handler(void)
00217 {
00218 if (pdca_get_transfer_status(AIC23B_SSC_RX_PDCA_CHANNEL) & PDCA_TRANSFER_COMPLETE)
00219 {
00220 pdca_disable_interrupt_transfer_complete(AIC23B_SSC_RX_PDCA_CHANNEL);
00221 if (aic23b_output_params.callback_opt & AUDIO_ADC_OUT_OF_SAMPLE_CB)
00222 aic23b_output_params.callback(AUDIO_ADC_OUT_OF_SAMPLE_CB);
00223 }
00224
00225 if (pdca_get_transfer_status(AIC23B_SSC_RX_PDCA_CHANNEL) & PDCA_TRANSFER_COUNTER_RELOAD_IS_ZERO)
00226 {
00227 pdca_disable_interrupt_reload_counter_zero(AIC23B_SSC_RX_PDCA_CHANNEL);
00228 if (aic23b_output_params.callback_opt & AUDIO_ADC_RELOAD_CB)
00229 aic23b_output_params.callback(AUDIO_ADC_RELOAD_CB);
00230 }
00231 }
00232 #endif
00233
00236 static void aic23b_write_control_word(aic23b_ctrl_t ctrl)
00237 {
00238 #if AIC23B_CTRL_INTERFACE == AIC23B_CTRL_INTERFACE_TWI
00239 int twi_status;
00240 aic23b_ctrl_t my_ctrl = ctrl;
00241 twi_package_t twi_package =
00242 {
00243 .chip = AIC23B_TWI_ADDRESS,
00244 .addr_length = AVR32_TWI_MMR_IADRSZ_NO_ADDR,
00245 .buffer = &my_ctrl,
00246 .length = sizeof(my_ctrl)
00247 };
00248 do
00249 {
00250 twi_status=twi_master_write(AIC23B_TWI, &twi_package);
00251 }
00252 while( twi_status != TWI_SUCCESS );
00253 #elif AIC23B_CTRL_INTERFACE == AIC23B_CTRL_INTERFACE_SPI
00254 spi_selectChip(AIC23B_SPI, AIC23B_SPI_NPCS);
00255 spi_write(AIC23B_SPI, *(U16 *)&ctrl);
00256 spi_unselectChip(AIC23B_SPI, AIC23B_SPI_NPCS);
00257 #endif
00258 }
00259
00260
00263
00264
00265 void aic23b_configure_freq(int master_clock_hz, int sample_rate_hz)
00266 {
00267 aic23b_src_t src;
00268
00269 src.data = AIC23B_DEFAULT(AIC23B_SRC);
00270 src.clkout = 0;
00271 src.clkin = 0;
00272
00273 switch (master_clock_hz)
00274 {
00275 case 12000000:
00276 src.usb = 1;
00277 if (sample_rate_hz < (8000 + 8021) / 2)
00278 {
00279 src.sr = 0x3;
00280 src.bosr = 0;
00281 }
00282 else if (sample_rate_hz < (8021 + 32000) / 2)
00283 {
00284 src.sr = 0xB;
00285 src.bosr = 1;
00286 }
00287 else if (sample_rate_hz < (32000 + 44100) / 2)
00288 {
00289 src.sr = 0x6;
00290 src.bosr = 0;
00291 }
00292 else if (sample_rate_hz < (44100 + 48000) / 2)
00293 {
00294 src.sr = 0x8;
00295 src.bosr = 1;
00296 }
00297 else if (sample_rate_hz < (48000 + 88200) / 2)
00298 {
00299 src.sr = 0x0;
00300 src.bosr = 0;
00301 }
00302 else if (sample_rate_hz < (88200 + 96000) / 2)
00303 {
00304 src.sr = 0xF;
00305 src.bosr = 1;
00306 }
00307 else
00308 {
00309 src.sr = 0x7;
00310 src.bosr = 0;
00311 }
00312 break;
00313 case 11289600:
00314 src.usb = 0;
00315 if (sample_rate_hz < (8021 + 22050) / 2)
00316 {
00317 src.sr = 0xB;
00318 src.bosr = 0;
00319 }
00320 else if (sample_rate_hz < (22050 + 88200) / 2)
00321 {
00322 src.sr = 0x8;
00323 src.bosr = 0;
00324 }
00325 else
00326 {
00327 src.sr = 0xF;
00328 src.bosr = 0;
00329 }
00330 break;
00331 case 18432000:
00332 case 8192000:
00333 src.usb = 0;
00334 src.sr = 0;
00335 src.bosr = 1;
00336 break;
00337 case 12288000:
00338 src.usb = 0;
00339 src.sr = 6;
00340 src.bosr = 0;
00341 break;
00342 default:
00343
00344 return;
00345 }
00346
00347 aic23b_write_reg(AIC23B_SRC, src.data);
00348 }
00349
00350
00351
00352 U16 aic23b_read_reg(U8 reg)
00353 {
00354 if (reg >= AIC23B_REG_COUNT) return 0x0000;
00355 return aic23b_ctrl[reg].data;
00356 }
00357
00358
00359 void aic23b_write_reg(U8 reg, U16 val)
00360 {
00361 if (reg >= AIC23B_REG_COUNT) return;
00362 aic23b_ctrl[reg].data = val;
00363 if (reg == AIC23B_RR && aic23b_ctrl[reg].data == AIC23B_DEFAULT(AIC23B_RR))
00364 {
00365 memcpy(aic23b_ctrl, aic23b_ctrl_reset, sizeof(aic23b_ctrl));
00366 }
00367 aic23b_write_control_word(aic23b_ctrl[reg]);
00368 }
00369
00370
00372
00373
00376
00377
00378
00379 S8 aic23b_get_line_in_volume(U8 ch)
00380 {
00381 switch (ch)
00382 {
00383 case AIC23B_LEFT_CHANNEL:
00384 {
00385 aic23b_llicvc_t llicvc;
00386 llicvc.data = aic23b_read_reg(AIC23B_LLICVC);
00387 return (llicvc.lim) ?
00388 AIC23B_MUTED :
00389 llicvc.liv - AIC23B_LIN_VOL_OFFSET;
00390 }
00391 case AIC23B_RIGHT_CHANNEL:
00392 {
00393 aic23b_rlicvc_t rlicvc;
00394 rlicvc.data = aic23b_read_reg(AIC23B_RLICVC);
00395 return (rlicvc.rim) ?
00396 AIC23B_MUTED :
00397 rlicvc.riv - AIC23B_LIN_VOL_OFFSET;
00398 }
00399 default:
00400 return AIC23B_MUTED;
00401 }
00402 }
00403
00404
00405 void aic23b_set_line_in_volume(U8 ch_mask, S8 vol)
00406 {
00407 if (ch_mask & AIC23B_LEFT_CHANNEL)
00408 {
00409 aic23b_llicvc_t llicvc;
00410 llicvc.data = aic23b_read_reg(AIC23B_LLICVC);
00411 llicvc.lrs = ((ch_mask & AIC23B_RIGHT_CHANNEL) != 0);
00412 if (vol < AIC23B_LIN_VOL_MIN) llicvc.lim = 1;
00413 else
00414 {
00415 llicvc.lim = 0;
00416 llicvc.liv = min(vol, AIC23B_LIN_VOL_MAX) + AIC23B_LIN_VOL_OFFSET;
00417 }
00418 aic23b_write_reg(AIC23B_LLICVC, llicvc.data);
00419 }
00420 else if (ch_mask & AIC23B_RIGHT_CHANNEL)
00421 {
00422 aic23b_rlicvc_t rlicvc;
00423 rlicvc.data = aic23b_read_reg(AIC23B_RLICVC);
00424 rlicvc.rls = 0;
00425 if (vol < AIC23B_LIN_VOL_MIN) rlicvc.rim = 1;
00426 else
00427 {
00428 rlicvc.rim = 0;
00429 rlicvc.riv = min(vol, AIC23B_LIN_VOL_MAX) + AIC23B_LIN_VOL_OFFSET;
00430 }
00431 aic23b_write_reg(AIC23B_RLICVC, rlicvc.data);
00432 }
00433 }
00434
00435 U8 aic23b_dac_get_average_headphone_volume(void)
00436 {
00437 S32 volume, volume_avg = 0;
00438 aic23b_lchvc_t lchvc;
00439 aic23b_rchvc_t rchvc;
00440
00441 lchvc.data = aic23b_read_reg(AIC23B_LCHVC);
00442 rchvc.data = aic23b_read_reg(AIC23B_RCHVC);
00443 volume_avg = (lchvc.lhv < AIC23B_HP_VOL_MIN + AIC23B_HP_VOL_OFFSET) ?
00444 0 : lchvc.lhv - AIC23B_HP_VOL_OFFSET - AIC23B_HP_VOL_MIN;
00445 volume = (rchvc.rhv < AIC23B_HP_VOL_MIN + AIC23B_HP_VOL_OFFSET) ?
00446 0 : rchvc.rhv - AIC23B_HP_VOL_OFFSET - AIC23B_HP_VOL_MIN;
00447
00448 volume_avg = (volume_avg + volume) / 2;
00449
00450 volume_avg = (volume_avg * 255) / (AIC23B_HP_VOL_MAX - AIC23B_HP_VOL_MIN);
00451
00452 return (U8) volume_avg;
00453 }
00454
00455 void aic23b_dac_set_average_headphone_volume(U8 volume)
00456 {
00457 aic23b_set_headphone_volume(AIC23B_LEFT_CHANNEL | AIC23B_RIGHT_CHANNEL,volume,TRUE);
00458 }
00459
00460 Bool aic23b_dac_is_headphone_volume_muted(void)
00461 {
00462 return FALSE;
00463 }
00464
00465 Bool aic23b_dac_is_headphone_volume_boosted(void)
00466 {
00467 return FALSE;
00468 }
00469
00470 S8 aic23b_get_headphone_volume(U8 ch)
00471 {
00472 switch (ch)
00473 {
00474 case AIC23B_LEFT_CHANNEL:
00475 {
00476 aic23b_lchvc_t lchvc;
00477 lchvc.data = aic23b_read_reg(AIC23B_LCHVC);
00478 return (lchvc.lhv < AIC23B_HP_VOL_MIN + AIC23B_HP_VOL_OFFSET) ?
00479 AIC23B_MUTED :
00480 lchvc.lhv - AIC23B_HP_VOL_OFFSET;
00481 }
00482 case AIC23B_RIGHT_CHANNEL:
00483 {
00484 aic23b_rchvc_t rchvc;
00485 rchvc.data = aic23b_read_reg(AIC23B_RCHVC);
00486 return (rchvc.rhv < AIC23B_HP_VOL_MIN + AIC23B_HP_VOL_OFFSET) ?
00487 AIC23B_MUTED :
00488 rchvc.rhv - AIC23B_HP_VOL_OFFSET;
00489 }
00490 default:
00491 return AIC23B_MUTED;
00492 }
00493 }
00494
00495 void aic23b_set_headphone_volume(U8 ch_mask, S8 vol, Bool z_cross)
00496 {
00497 if (ch_mask & AIC23B_LEFT_CHANNEL)
00498 {
00499 aic23b_lchvc_t lchvc;
00500 lchvc.data = aic23b_read_reg(AIC23B_LCHVC);
00501 lchvc.lrs = ((ch_mask & AIC23B_RIGHT_CHANNEL) != 0);
00502 lchvc.lzc = z_cross;
00503 lchvc.lhv = (vol < AIC23B_HP_VOL_MIN) ?
00504 0 :
00505 min(vol, AIC23B_HP_VOL_MAX) + AIC23B_HP_VOL_OFFSET;
00506 aic23b_write_reg(AIC23B_LCHVC, lchvc.data);
00507 }
00508 if (ch_mask & AIC23B_RIGHT_CHANNEL)
00509 {
00510 aic23b_rchvc_t rchvc;
00511 rchvc.data = aic23b_read_reg(AIC23B_RCHVC);
00512 rchvc.rls = 0;
00513 rchvc.rzc = z_cross;
00514 rchvc.rhv = (vol < AIC23B_HP_VOL_MIN) ?
00515 0 :
00516 min(vol, AIC23B_HP_VOL_MAX) + AIC23B_HP_VOL_OFFSET;
00517 aic23b_write_reg(AIC23B_RCHVC, rchvc.data);
00518 }
00519 }
00520
00521
00522 aic23b_aapc_t aic23b_get_analog_audio_path(void)
00523 {
00524 aic23b_aapc_t aapc;
00525 aapc.data = aic23b_read_reg(AIC23B_AAPC);
00526 return aapc;
00527 }
00528
00529
00530 void aic23b_set_analog_audio_path(aic23b_aapc_t aapc)
00531 {
00532 aic23b_write_reg(AIC23B_AAPC, aapc.data);
00533 }
00534
00535
00536 aic23b_dapc_t aic23b_get_digital_audio_path(void)
00537 {
00538 aic23b_dapc_t dapc;
00539 dapc.data = aic23b_read_reg(AIC23B_DAPC);
00540 return dapc;
00541 }
00542
00543
00544 void aic23b_set_digital_audio_path(aic23b_dapc_t dapc)
00545 {
00546 aic23b_write_reg(AIC23B_DAPC, dapc.data);
00547 }
00548
00549
00550 aic23b_pdc_t aic23b_get_power_down_state(void)
00551 {
00552 aic23b_pdc_t pdc;
00553 pdc.data = aic23b_read_reg(AIC23B_PDC);
00554 return pdc;
00555 }
00556
00557
00558 void aic23b_set_power_down_state(aic23b_pdc_t pdc)
00559 {
00560 aic23b_write_reg(AIC23B_PDC, pdc.data);
00561 }
00562
00563
00564 Bool aic23b_is_dig_audio_activated(void)
00565 {
00566 aic23b_dia_t dia;
00567 dia.data = aic23b_read_reg(AIC23B_DIA);
00568 return dia.act;
00569 }
00570
00571
00572 void aic23b_activate_dig_audio(Bool act)
00573 {
00574 aic23b_dia_t dia;
00575 dia.data = aic23b_read_reg(AIC23B_DIA);
00576 dia.act = act;
00577 aic23b_write_reg(AIC23B_DIA, dia.data);
00578 }
00579
00580
00581 void aic23b_reset(void)
00582 {
00583 aic23b_rr_t rr;
00584 rr.data = aic23b_read_reg(AIC23B_RR);
00585 rr.res = AIC23B_DEFAULT(AIC23B_RR) >> AIC23B_OFFSET(AIC23B_RR, RES);
00586 aic23b_write_reg(AIC23B_RR, rr.data);
00587 }
00588
00589
00591
00592
00595
00596 #if (AIC23B_MODE==AIC23B_MODE_DAC)
00597 void aic23b_dac_start(U32 sample_rate_hz,
00598 U8 num_channels,
00599 U8 bits_per_sample,
00600 Bool swap_channels,
00601 void (*callback)(U32 arg),
00602 U32 callback_opt,
00603 U32 pba_hz)
00604 {
00605 #if AIC23B_CTRL_INTERFACE == AIC23B_CTRL_INTERFACE_SPI
00606 static const spi_options_t AIC23B_SPI_OPTIONS =
00607 {
00608 .reg = AIC23B_SPI_NPCS,
00609 .baudrate = AIC23B_SPI_MASTER_SPEED,
00610 .bits = AIC23B_CTRL_SIZE,
00611 .spck_delay = 0,
00612 .trans_delay = 0,
00613 .stay_act = 0,
00614 .spi_mode = 3,
00615 .modfdis = 1
00616 };
00617 spi_setupChipReg(AIC23B_SPI, &AIC23B_SPI_OPTIONS, pba_hz);
00618 #endif
00619
00620 aic23b_dac_stop();
00621
00622 gpio_enable_module(AIC23B_SSC_DAC_GPIO_MAP,
00623 sizeof(AIC23B_SSC_DAC_GPIO_MAP) / sizeof(AIC23B_SSC_DAC_GPIO_MAP[0]));
00624
00625 aic23b_pdc_t pdc;
00626 pdc.data = AIC23B_DEFAULT(AIC23B_PDC);
00627 pdc.off = 0;
00628 pdc.clk = 0;
00629 pdc.osc = 0;
00630 pdc.out = 0;
00631 pdc.dac = 0;
00632 pdc.adc = 1;
00633 pdc.mic = 1;
00634 pdc.line = 1;
00635 aic23b_set_power_down_state(pdc);
00636
00637 aic23b_dac_setup(sample_rate_hz,
00638 num_channels,
00639 bits_per_sample,
00640 swap_channels,
00641 callback,
00642 callback_opt,
00643 pba_hz);
00644
00645 aic23b_aapc_t aapc;
00646 aapc.data = AIC23B_DEFAULT(AIC23B_AAPC);
00647 aapc.ste = 0;
00648 aapc.dac = 1;
00649 aapc.byp = 0;
00650 aapc.micm = 1;
00651 aapc.micb = 0;
00652 aic23b_set_analog_audio_path(aapc);
00653
00654 aic23b_dapc_t dapc;
00655 dapc.data = AIC23B_DEFAULT(AIC23B_DAPC);
00656 dapc.dacm = 0;
00657 dapc.deemp = AIC23B_DAPC_DEEMP_NONE;
00658 dapc.adchp = 1;
00659 aic23b_set_digital_audio_path(dapc);
00660
00661
00662 aic23b_set_headphone_volume(AIC23B_LEFT_CHANNEL | AIC23B_RIGHT_CHANNEL,
00663 -30,
00664 TRUE);
00665
00666 aic23b_activate_dig_audio(TRUE);
00667
00668 INTC_register_interrupt(&aic23b_ssc_tx_pdca_int_handler,
00669 AIC23B_SSC_TX_PDCA_IRQ,
00670 AIC23B_SSC_TX_PDCA_INT_LEVEL);
00671 }
00672
00673
00674 void aic23b_dac_setup(U32 sample_rate_hz,
00675 U8 num_channels,
00676 U8 bits_per_sample,
00677 Bool swap_channels,
00678 void (*callback)(U32 arg),
00679 U32 callback_opt,
00680 U32 pba_hz)
00681 {
00682 U32 master_clock = AIC23B_MCLK_HZ;
00683
00684
00685
00686
00687
00688
00689
00690
00691
00692
00693
00694 if (sample_rate_hz < (8000 + 8021) / 2)
00695 {
00696 }
00697 else if (sample_rate_hz < (8021 + 32000) / 2)
00698 {
00699 }
00700 else if (sample_rate_hz < (32000 + 44100) / 2)
00701 {
00702 master_clock = usb_stream_resync_frequency = 8192000;
00703 cs2200_freq_clk_out(_32_BITS_RATIO(usb_stream_resync_frequency));
00704 pba_hz = FCPU_HZ = FHSB_HZ = FPBA_HZ = FPBB_HZ = FMCK_HZ(8192000);
00705 cpu_delay_ms(50, pba_hz);
00706 }
00707 else if (sample_rate_hz < (44100 + 48000) / 2)
00708 {
00709 master_clock = usb_stream_resync_frequency = 11289600;
00710 cs2200_freq_clk_out(_32_BITS_RATIO(usb_stream_resync_frequency));
00711 pba_hz = FCPU_HZ = FHSB_HZ = FPBA_HZ = FPBB_HZ = FMCK_HZ(11289600);
00712 cpu_delay_ms(50, pba_hz);
00713 }
00714 else if (sample_rate_hz < (48000 + 88200) / 2)
00715 {
00716 master_clock = usb_stream_resync_frequency = 12288000;
00717 cs2200_freq_clk_out(_32_BITS_RATIO(usb_stream_resync_frequency));
00718 pba_hz = FCPU_HZ = FHSB_HZ = FPBA_HZ = FPBB_HZ = FMCK_HZ(12288000);
00719 cpu_delay_ms(50, pba_hz);
00720 }
00721 else if (sample_rate_hz < (88200 + 96000) / 2)
00722 {
00723 }
00724 else
00725 {
00726 }
00727
00728
00729
00730 #if defined(AIC23B_DAC_USE_RX_CLOCK) && AIC23B_DAC_USE_RX_CLOCK == ENABLED
00731 #if defined(AIC23B_DAC_RX_CLOCK_SET_CALLBACK)
00732 AIC23B_DAC_RX_CLOCK_SET_CALLBACK(2 * sample_rate_hz *
00733 ((bits_per_sample <= 16) ? 16 :
00734 (bits_per_sample <= 20) ? 20 :
00735 (bits_per_sample <= 24) ? 24 :
00736 32));
00737 #endif
00738 ssc_i2s_init(AIC23B_SSC,
00739 sample_rate_hz,
00740 bits_per_sample,
00741 (bits_per_sample <= 16) ? 16 :
00742 (bits_per_sample <= 20) ? 20 :
00743 (bits_per_sample <= 24) ? 24 :
00744 32,
00745 SSC_I2S_MODE_STEREO_OUT_EXT_CLK,
00746 pba_hz);
00747 #else
00748 ssc_i2s_init(AIC23B_SSC,
00749 sample_rate_hz,
00750 bits_per_sample,
00751 (bits_per_sample <= 16) ? 16 :
00752 (bits_per_sample <= 20) ? 20 :
00753 (bits_per_sample <= 24) ? 24 :
00754 32,
00755 SSC_I2S_MODE_STEREO_OUT,
00756 pba_hz);
00757 #endif
00758
00759 pdca_channel_options_t aic23b_ssc_pdca_options =
00760 {
00761 .addr = NULL,
00762 .size = 0,
00763 .r_addr = NULL,
00764 .r_size = 0,
00765 .pid = AIC23B_SSC_TX_PDCA_PID,
00766 .transfer_size = (bits_per_sample <= 8) ? PDCA_TRANSFER_SIZE_BYTE :
00767 (bits_per_sample <= 16) ? PDCA_TRANSFER_SIZE_HALF_WORD :
00768 PDCA_TRANSFER_SIZE_WORD
00769 };
00770 pdca_init_channel(AIC23B_SSC_TX_PDCA_CHANNEL, &aic23b_ssc_pdca_options);
00771 pdca_enable(AIC23B_SSC_TX_PDCA_CHANNEL);
00772
00773 #if !defined(AIC23B_DAC_USE_RX_CLOCK) || AIC23B_DAC_USE_RX_CLOCK == DISABLED || \
00774 !defined(AIC23B_DAC_RX_CLOCK_SET_CALLBACK)
00775
00776 aic23b_configure_freq(master_clock, sample_rate_hz);
00777 #endif
00778
00779 aic23b_daif_t daif;
00780 daif.data = AIC23B_DEFAULT(AIC23B_DAIF);
00781 daif.ms = AIC23B_DAIF_MS_SLAVE;
00782 daif.lrswap = swap_channels;
00783 daif.lrp = 0;
00784 daif.iwl = (bits_per_sample <= 16) ? AIC23B_DAIF_IWL_16 :
00785 (bits_per_sample <= 20) ? AIC23B_DAIF_IWL_20 :
00786 (bits_per_sample <= 24) ? AIC23B_DAIF_IWL_24 :
00787 AIC23B_DAIF_IWL_32;
00788 daif.fmt = AIC23B_DAIF_FMT_I2S;
00789 aic23b_write_reg(AIC23B_DAIF, daif.data);
00790
00791 aic23b_output_params.num_channels = num_channels;
00792 aic23b_output_params.callback = callback;
00793 aic23b_output_params.callback_opt = callback_opt;
00794 }
00795 #endif
00796
00797 Bool aic23b_dac_output(void *sample_buffer, size_t sample_length)
00798 {
00799 Bool global_interrupt_enabled;
00800
00801 if (!(pdca_get_transfer_status(AIC23B_SSC_TX_PDCA_CHANNEL) &
00802 PDCA_TRANSFER_COUNTER_RELOAD_IS_ZERO))
00803 return FALSE;
00804
00805 if (sample_length)
00806 {
00807 if (aic23b_output_params.num_channels == 1)
00808 {
00809 S16 *s16_sample_buffer = sample_buffer;
00810 int i;
00811
00812 for (i = sample_length - 1; i >= 0; i--)
00813 {
00814 s16_sample_buffer[2 * i + 1] =
00815 s16_sample_buffer[2 * i] = s16_sample_buffer[i];
00816 }
00817 }
00818
00819
00820
00821
00822 if ((global_interrupt_enabled = Is_global_interrupt_enabled()))
00823 Disable_global_interrupt();
00824 if (pdca_get_transfer_status(AIC23B_SSC_TX_PDCA_CHANNEL) &
00825 PDCA_TRANSFER_COMPLETE)
00826 {
00827 while (gpio_get_pin_value(AIC23B_SSC_TX_FRAME_SYNC_PIN));
00828 while (!gpio_get_pin_value(AIC23B_SSC_TX_FRAME_SYNC_PIN));
00829 }
00830 pdca_reload_channel(AIC23B_SSC_TX_PDCA_CHANNEL, sample_buffer, sample_length * 2);
00831 pdca_get_reload_size(AIC23B_SSC_TX_PDCA_CHANNEL);
00832 if (global_interrupt_enabled)
00833 Enable_global_interrupt();
00834
00835 if (aic23b_output_params.callback_opt & AUDIO_DAC_OUT_OF_SAMPLE_CB)
00836 pdca_enable_interrupt_transfer_complete(AIC23B_SSC_TX_PDCA_CHANNEL);
00837 if (aic23b_output_params.callback_opt & AUDIO_DAC_RELOAD_CB)
00838 pdca_enable_interrupt_reload_counter_zero(AIC23B_SSC_TX_PDCA_CHANNEL);
00839 }
00840 return TRUE;
00841 }
00842
00843
00844 void aic23b_dac_increase_volume(void)
00845 {
00846 S8 volume = aic23b_get_headphone_volume(AIC23B_LEFT_CHANNEL);
00847 if( volume < AIC23B_HP_VOL_MIN )
00848 volume = AIC23B_HP_VOL_MIN;
00849 aic23b_set_headphone_volume(AIC23B_LEFT_CHANNEL | AIC23B_RIGHT_CHANNEL,
00850 volume + 1,
00851 TRUE);
00852 }
00853
00854
00855 void aic23b_dac_decrease_volume(void)
00856 {
00857 S8 volume = aic23b_get_headphone_volume(AIC23B_LEFT_CHANNEL);
00858 if( volume != AIC23B_MUTED )
00859 volume--;
00860 aic23b_set_headphone_volume(AIC23B_LEFT_CHANNEL | AIC23B_RIGHT_CHANNEL,
00861 volume,
00862 TRUE);
00863 }
00864
00865 void aic23b_dac_mute(Bool mute)
00866 {
00867 #if (AIC23B_MODE==AIC23B_MODE_DAC)
00868
00869
00870
00871
00872
00873
00874
00875 if (mute)
00876 {
00877 U32 save_dac_reload_callback_opt;
00878
00879
00880 save_dac_reload_callback_opt = aic23b_output_params.callback_opt;
00881 aic23b_output_params.callback_opt = 0;
00882
00883 pdca_disable_interrupt_reload_counter_zero(AIC23B_SSC_TX_PDCA_CHANNEL);
00884 while (!(pdca_get_transfer_status(AIC23B_SSC_TX_PDCA_CHANNEL) & PDCA_TRANSFER_COMPLETE));
00885
00886 aic23b_output_params.callback_opt = save_dac_reload_callback_opt;
00887 }
00888 else
00889 {
00890
00891 pdca_enable_interrupt_reload_counter_zero(AIC23B_SSC_TX_PDCA_CHANNEL);
00892 }
00893
00894 #endif
00895 }
00896
00897 #if (AIC23B_MODE==AIC23B_MODE_DAC)
00898 void aic23b_dac_flush(void)
00899 {
00900 pdca_disable_interrupt_transfer_complete(AIC23B_SSC_TX_PDCA_CHANNEL);
00901 pdca_disable_interrupt_reload_counter_zero(AIC23B_SSC_TX_PDCA_CHANNEL);
00902
00903 while (!(pdca_get_transfer_status(AIC23B_SSC_TX_PDCA_CHANNEL) &
00904 PDCA_TRANSFER_COMPLETE));
00905 }
00906
00907
00908 void aic23b_dac_stop(void)
00909 {
00910 aic23b_dac_flush();
00911
00912
00913 aic23b_reset();
00914
00915 aic23b_pdc_t pdc;
00916 pdc.data = AIC23B_DEFAULT(AIC23B_PDC);
00917 pdc.off = 1;
00918 pdc.clk = 1;
00919 pdc.osc = 1;
00920 pdc.out = 1;
00921 pdc.dac = 1;
00922 pdc.adc = 1;
00923 pdc.mic = 1;
00924 pdc.line = 1;
00925 aic23b_set_power_down_state(pdc);
00926
00927
00928 pdca_disable(AIC23B_SSC_TX_PDCA_CHANNEL);
00929
00930 ssc_i2s_reset(AIC23B_SSC);
00931
00932
00933 gpio_enable_gpio(AIC23B_SSC_DAC_GPIO_MAP,
00934 sizeof(AIC23B_SSC_DAC_GPIO_MAP) / sizeof(AIC23B_SSC_DAC_GPIO_MAP[0]));
00935
00936 aic23b_output_params.num_channels = 0;
00937 aic23b_output_params.callback = NULL;
00938 aic23b_output_params.callback_opt = 0;
00939 }
00940 #endif
00941
00942 #if (AIC23B_MODE==AIC23B_MODE_ADC)
00943 void aic23b_adc_start(U32 sample_rate_hz,
00944 U8 num_channels,
00945 U8 bits_per_sample,
00946 Bool swap_channels,
00947 void (*callback)(U32 arg),
00948 U32 callback_opt,
00949 U32 pba_hz)
00950 {
00951 #if AIC23B_CTRL_INTERFACE == AIC23B_CTRL_INTERFACE_SPI
00952 static const spi_options_t AIC23B_SPI_OPTIONS =
00953 {
00954 .reg = AIC23B_SPI_NPCS,
00955 .baudrate = AIC23B_SPI_MASTER_SPEED,
00956 .bits = AIC23B_CTRL_SIZE,
00957 .spck_delay = 0,
00958 .trans_delay = 0,
00959 .stay_act = 0,
00960 .spi_mode = 3,
00961 .modfdis = 1
00962 };
00963 spi_setupChipReg(AIC23B_SPI, &AIC23B_SPI_OPTIONS, pba_hz);
00964 #endif
00965
00966 aic23b_adc_stop();
00967
00968 gpio_enable_module(AIC23B_SSC_ADC_GPIO_MAP,
00969 sizeof(AIC23B_SSC_ADC_GPIO_MAP) / sizeof(AIC23B_SSC_ADC_GPIO_MAP[0]));
00970
00971 aic23b_pdc_t pdc;
00972 pdc.data = AIC23B_DEFAULT(AIC23B_PDC);
00973 pdc.off = 0;
00974 pdc.clk = 0;
00975 pdc.osc = 0;
00976 pdc.out = 0;
00977 pdc.dac = 1;
00978 pdc.adc = 0;
00979 #if (AIC23B_INPUT==AIC23B_INPUT_LINE)
00980 pdc.mic = 1;
00981 pdc.line = 0;
00982 #elif (AIC23B_INPUT==AIC23B_INPUT_MIC)
00983 pdc.mic = 0;
00984 pdc.line = 1;
00985 #else
00986 #error No Input defined in file 'conf_tlv320aic23b.h'
00987 #endif
00988 aic23b_set_power_down_state(pdc);
00989
00990 aic23b_adc_setup(sample_rate_hz,
00991 num_channels,
00992 bits_per_sample,
00993 swap_channels,
00994 callback,
00995 callback_opt,
00996 pba_hz);
00997
00998 aic23b_aapc_t aapc;
00999 aapc.data = AIC23B_DEFAULT(AIC23B_AAPC);
01000 #if (AIC23B_INPUT==AIC23B_INPUT_LINE)
01001 aapc.ste = 0;
01002 aapc.dac = 0;
01003 aapc.byp = 0;
01004 aapc.insel = 0;
01005 aapc.micm = 0;
01006 aapc.micb = 0;
01007 #elif (AIC23B_INPUT==AIC23B_INPUT_MIC)
01008 aapc.ste = 0;
01009 aapc.dac = 0;
01010 aapc.byp = 0;
01011 aapc.insel = 1;
01012 aapc.micm = 0;
01013 aapc.micb = 0;
01014 #else
01015 #error No Input defined in file 'conf_tlv320aic23b.h'
01016 #endif
01017 aic23b_set_analog_audio_path(aapc);
01018
01019 aic23b_dapc_t dapc;
01020 dapc.data = AIC23B_DEFAULT(AIC23B_DAPC);
01021 dapc.dacm = 0;
01022 dapc.deemp = AIC23B_DAPC_DEEMP_NONE;
01023 dapc.adchp = 0;
01024 aic23b_set_digital_audio_path(dapc);
01025
01026
01027 aic23b_llicvc_t llivc;
01028 llivc.data = AIC23B_DEFAULT(AIC23B_LLICVC);
01029 llivc.liv = 20;
01030 llivc.lim = 0;
01031 llivc.lrs = 1;
01032 aic23b_write_reg(AIC23B_LLICVC, llivc.data);
01033
01034 aic23b_rlicvc_t rlivc;
01035 rlivc.data = AIC23B_DEFAULT(AIC23B_RLICVC);
01036 rlivc.riv = 20;
01037 rlivc.rim = 0;
01038 rlivc.rls = 1;
01039 aic23b_write_reg(AIC23B_RLICVC, rlivc.data);
01040
01041 INTC_register_interrupt(&aic23b_ssc_rx_pdca_int_handler,
01042 AIC23B_SSC_RX_PDCA_IRQ,
01043 AIC23B_SSC_RX_PDCA_INT_LEVEL);
01044
01045 aic23b_activate_dig_audio(TRUE);
01046
01047 }
01048
01049 void aic23b_adc_setup(U32 sample_rate_hz,
01050 U8 num_channels,
01051 U8 bits_per_sample,
01052 Bool swap_channels,
01053 void (*callback)(U32 arg),
01054 callback_opt,
01055 U32 pba_hz)
01056 {
01057 ssc_i2s_init(AIC23B_SSC,
01058 sample_rate_hz,
01059 bits_per_sample,
01060 (bits_per_sample <= 16) ? 16 :
01061 (bits_per_sample <= 20) ? 20 :
01062 (bits_per_sample <= 24) ? 24 :
01063 32,
01064 SSC_I2S_MODE_STEREO_IN,
01065 pba_hz);
01066
01067 pdca_channel_options_t aic23b_ssc_pdca_options =
01068 {
01069 .addr = NULL,
01070 .size = 0,
01071 .r_addr = NULL,
01072 .r_size = 0,
01073 .pid = AIC23B_SSC_RX_PDCA_PID,
01074 .transfer_size = (bits_per_sample <= 8) ? PDCA_TRANSFER_SIZE_BYTE :
01075 (bits_per_sample <= 16) ? PDCA_TRANSFER_SIZE_HALF_WORD :
01076 PDCA_TRANSFER_SIZE_WORD
01077 };
01078 pdca_init_channel(AIC23B_SSC_RX_PDCA_CHANNEL, &aic23b_ssc_pdca_options);
01079 pdca_enable(AIC23B_SSC_RX_PDCA_CHANNEL);
01080
01081
01082 aic23b_configure_freq(AIC23B_MCLK_HZ, sample_rate_hz);
01083
01084 aic23b_daif_t daif;
01085 daif.data = AIC23B_DEFAULT(AIC23B_DAIF);
01086 daif.ms = AIC23B_DAIF_MS_SLAVE;
01087 daif.lrswap = swap_channels;
01088 daif.lrp = 0;
01089 daif.iwl = (bits_per_sample <= 16) ? AIC23B_DAIF_IWL_16 :
01090 (bits_per_sample <= 20) ? AIC23B_DAIF_IWL_20 :
01091 (bits_per_sample <= 24) ? AIC23B_DAIF_IWL_24 :
01092 AIC23B_DAIF_IWL_32;
01093 daif.fmt = AIC23B_DAIF_FMT_I2S;
01094 aic23b_write_reg(AIC23B_DAIF, daif.data);
01095
01096 aic23b_output_params.num_channels = num_channels;
01097 aic23b_output_params.callback = callback;
01098 aic23b_output_params.callback_opt = callback_opt;
01099 }
01100
01101 void aic23b_adc_flush(void)
01102 {
01103 pdca_disable_interrupt_transfer_complete(AIC23B_SSC_RX_PDCA_CHANNEL);
01104
01105 while (!(pdca_get_transfer_status(AIC23B_SSC_RX_PDCA_CHANNEL) &
01106 PDCA_TRANSFER_COMPLETE));
01107 }
01108
01109
01110 void aic23b_adc_stop(void)
01111 {
01112 aic23b_adc_flush();
01113
01114 aic23b_reset();
01115
01116 aic23b_pdc_t pdc;
01117 pdc.data = AIC23B_DEFAULT(AIC23B_PDC);
01118 pdc.off = 1;
01119 pdc.clk = 1;
01120 pdc.osc = 1;
01121 pdc.out = 1;
01122 pdc.dac = 1;
01123 pdc.adc = 1;
01124 pdc.mic = 1;
01125 pdc.line = 1;
01126 aic23b_set_power_down_state(pdc);
01127
01128 pdca_disable(AIC23B_SSC_RX_PDCA_CHANNEL);
01129 ssc_i2s_reset(AIC23B_SSC);
01130
01131 gpio_enable_gpio(AIC23B_SSC_ADC_GPIO_MAP,
01132 sizeof(AIC23B_SSC_ADC_GPIO_MAP) / sizeof(AIC23B_SSC_ADC_GPIO_MAP[0]));
01133
01134 aic23b_output_params.num_channels = 0;
01135 aic23b_output_params.callback = NULL;
01136 aic23b_output_params.callback_opt = 0;
01137 }
01138 #endif
01139
01140 #if (AIC23B_MODE==AIC23B_MODE_ADC)||(AIC23B_MODE==AIC23B_MODE_CODEC)
01141 Bool aic23b_adc_input(void *sample_buffer, size_t sample_length)
01142 {
01143 if (!(pdca_get_transfer_status(AIC23B_SSC_RX_PDCA_CHANNEL) &
01144 PDCA_TRANSFER_COUNTER_RELOAD_IS_ZERO))
01145 return FALSE;
01146
01147 if (sample_length)
01148 {
01149 pdca_reload_channel(AIC23B_SSC_RX_PDCA_CHANNEL, sample_buffer, sample_length * 2);
01150 pdca_get_reload_size(AIC23B_SSC_RX_PDCA_CHANNEL);
01151
01152 if (aic23b_output_params.callback_opt & AUDIO_ADC_OUT_OF_SAMPLE_CB)
01153 pdca_enable_interrupt_transfer_complete(AIC23B_SSC_RX_PDCA_CHANNEL);
01154 if (aic23b_output_params.callback_opt & AUDIO_ADC_RELOAD_CB)
01155 pdca_enable_interrupt_reload_counter_zero(AIC23B_SSC_RX_PDCA_CHANNEL);
01156 }
01157
01158 return TRUE;
01159 }
01160 #endif
01161
01162 #if (AIC23B_MODE==AIC23B_MODE_CODEC)
01163 void aic23b_codec_start(U32 sample_rate_hz,
01164 U8 num_channels,
01165 U8 bits_per_sample,
01166 Bool swap_channels,
01167 void (*callback)(U32 arg),
01168 U32 callback_opt,
01169 U32 pba_hz)
01170 {
01171 #if AIC23B_CTRL_INTERFACE == AIC23B_CTRL_INTERFACE_SPI
01172 static const spi_options_t AIC23B_SPI_OPTIONS =
01173 {
01174 .reg = AIC23B_SPI_NPCS,
01175 .baudrate = AIC23B_SPI_MASTER_SPEED,
01176 .bits = AIC23B_CTRL_SIZE,
01177 .spck_delay = 0,
01178 .trans_delay = 0,
01179 .stay_act = 0,
01180 .spi_mode = 3,
01181 .modfdis = 1
01182 };
01183 spi_setupChipReg(AIC23B_SPI, &AIC23B_SPI_OPTIONS, pba_hz);
01184 #endif
01185
01186 aic23b_codec_stop();
01187
01188 gpio_enable_module(AIC23B_SSC_CODEC_GPIO_MAP,
01189 sizeof(AIC23B_SSC_CODEC_GPIO_MAP) / sizeof(AIC23B_SSC_CODEC_GPIO_MAP[0]));
01190
01191 aic23b_pdc_t pdc;
01192 pdc.data = AIC23B_DEFAULT(AIC23B_PDC);
01193 pdc.off = 0;
01194 pdc.clk = 0;
01195 pdc.osc = 0;
01196 pdc.out = 0;
01197 pdc.dac = 0;
01198 pdc.adc = 0;
01199 #if (AIC23B_INPUT==AIC23B_INPUT_LINE)
01200 pdc.mic = 1;
01201 pdc.line = 0;
01202 #elif (AIC23B_INPUT==AIC23B_INPUT_MIC)
01203 pdc.mic = 0;
01204 pdc.line = 1;
01205 #else
01206 #error No Input defined in file 'conf_tlv320aic23b.h'
01207 #endif
01208 aic23b_set_power_down_state(pdc);
01209
01210 aic23b_codec_setup(sample_rate_hz,
01211 num_channels,
01212 bits_per_sample,
01213 swap_channels,
01214 callback,
01215 callback_opt,
01216 pba_hz);
01217
01218 aic23b_aapc_t aapc;
01219 aapc.data = AIC23B_DEFAULT(AIC23B_AAPC);
01220 #if (AIC23B_INPUT==AIC23B_INPUT_LINE)
01221 aapc.ste = 0;
01222 aapc.dac = 1;
01223 aapc.byp = 0;
01224 aapc.insel = 0;
01225 aapc.micm = 0;
01226 aapc.micb = 1;
01227 #elif (AIC23B_INPUT==AIC23B_INPUT_MIC)
01228 aapc.ste = 0;
01229 aapc.dac = 1;
01230 aapc.sta = 4;
01231 aapc.byp = 0;
01232 aapc.insel = 1;
01233 aapc.micm = 0;
01234 aapc.micb = 1;
01235 #else
01236 #error No Input defined in file 'conf_tlv320aic23b.h'
01237 #endif
01238 aic23b_set_analog_audio_path(aapc);
01239
01240 aic23b_dapc_t dapc;
01241 dapc.data = AIC23B_DEFAULT(AIC23B_DAPC);
01242 dapc.dacm = 0;
01243 dapc.deemp = AIC23B_DAPC_DEEMP_NONE;
01244 dapc.adchp = 0;
01245 aic23b_set_digital_audio_path(dapc);
01246
01247
01248 aic23b_llicvc_t llivc;
01249 llivc.data = AIC23B_DEFAULT(AIC23B_LLICVC);
01250 llivc.liv = 20;
01251 llivc.lim = 0;
01252 llivc.lrs = 1;
01253 aic23b_write_reg(AIC23B_LLICVC, llivc.data);
01254
01255 aic23b_rlicvc_t rlivc;
01256 rlivc.data = AIC23B_DEFAULT(AIC23B_RLICVC);
01257 rlivc.riv = 20;
01258 rlivc.rim = 0;
01259 rlivc.rls = 1;
01260 aic23b_write_reg(AIC23B_RLICVC, rlivc.data);
01261
01262 INTC_register_interrupt(&aic23b_ssc_rx_pdca_int_handler,
01263 AIC23B_SSC_RX_PDCA_IRQ,
01264 AIC23B_SSC_RX_PDCA_INT_LEVEL);
01265
01266
01267 aic23b_set_headphone_volume(AIC23B_LEFT_CHANNEL | AIC23B_RIGHT_CHANNEL,
01268 -30,
01269 TRUE);
01270
01271 aic23b_activate_dig_audio(TRUE);
01272
01273 INTC_register_interrupt(&aic23b_ssc_tx_pdca_int_handler,
01274 AIC23B_SSC_TX_PDCA_IRQ,
01275 AIC23B_SSC_TX_PDCA_INT_LEVEL);
01276 }
01277
01278 void aic23b_codec_setup(U32 sample_rate_hz,
01279 U8 num_channels,
01280 U8 bits_per_sample,
01281 Bool swap_channels,
01282 void (*callback)(U32 opt),
01283 U32 callback_opt,
01284 U32 pba_hz)
01285 {
01286 U32 master_clock = AIC23B_MCLK_HZ;
01287
01288
01289
01290
01291
01292
01293
01294
01295
01296
01297
01298 if (sample_rate_hz < (8000 + 8021) / 2)
01299 {
01300 }
01301 else if (sample_rate_hz < (8021 + 32000) / 2)
01302 {
01303 }
01304 else if (sample_rate_hz < (32000 + 44100) / 2)
01305 {
01306 master_clock = usb_stream_resync_frequency = 8192000;
01307 cs2200_freq_clk_out(_32_BITS_RATIO(usb_stream_resync_frequency));
01308 pba_hz = FCPU_HZ = FHSB_HZ = FPBA_HZ = FPBB_HZ = FMCK_HZ(8192000);
01309 cpu_delay_ms(50, pba_hz);
01310 }
01311 else if (sample_rate_hz < (44100 + 48000) / 2)
01312 {
01313 master_clock = usb_stream_resync_frequency = 11289600;
01314 cs2200_freq_clk_out(_32_BITS_RATIO(usb_stream_resync_frequency));
01315 pba_hz = FCPU_HZ = FHSB_HZ = FPBA_HZ = FPBB_HZ = FMCK_HZ(11289600);
01316 cpu_delay_ms(50, pba_hz);
01317 }
01318 else if (sample_rate_hz < (48000 + 88200) / 2)
01319 {
01320 master_clock = usb_stream_resync_frequency = 12288000;
01321 cs2200_freq_clk_out(_32_BITS_RATIO(usb_stream_resync_frequency));
01322 pba_hz = FCPU_HZ = FHSB_HZ = FPBA_HZ = FPBB_HZ = FMCK_HZ(12288000);
01323 cpu_delay_ms(50, pba_hz);
01324 }
01325 else if (sample_rate_hz < (88200 + 96000) / 2)
01326 {
01327 }
01328 else
01329 {
01330 }
01331
01332
01333
01334 ssc_i2s_init(AIC23B_SSC,
01335 sample_rate_hz,
01336 bits_per_sample,
01337 (bits_per_sample <= 16) ? 16 :
01338 (bits_per_sample <= 20) ? 20 :
01339 (bits_per_sample <= 24) ? 24 :
01340 32,
01341 SSC_I2S_MODE_STEREO_OUT_STEREO_IN,
01342 pba_hz);
01343
01344 pdca_channel_options_t aic23b_ssc_pdca_options_rx =
01345 {
01346 .addr = NULL,
01347 .size = 0,
01348 .r_addr = NULL,
01349 .r_size = 0,
01350 .pid = AIC23B_SSC_RX_PDCA_PID,
01351 .transfer_size = (bits_per_sample <= 8) ? PDCA_TRANSFER_SIZE_BYTE :
01352 (bits_per_sample <= 16) ? PDCA_TRANSFER_SIZE_HALF_WORD :
01353 PDCA_TRANSFER_SIZE_WORD
01354
01355 };
01356 pdca_init_channel(AIC23B_SSC_RX_PDCA_CHANNEL, &aic23b_ssc_pdca_options_rx);
01357 pdca_enable(AIC23B_SSC_RX_PDCA_CHANNEL);
01358
01359 pdca_channel_options_t aic23b_ssc_pdca_options_tx =
01360 {
01361 .addr = NULL,
01362 .size = 0,
01363 .r_addr = NULL,
01364 .r_size = 0,
01365 .pid = AIC23B_SSC_TX_PDCA_PID,
01366 .transfer_size = (bits_per_sample <= 8) ? PDCA_TRANSFER_SIZE_BYTE :
01367 (bits_per_sample <= 16) ? PDCA_TRANSFER_SIZE_HALF_WORD :
01368 PDCA_TRANSFER_SIZE_WORD
01369 };
01370 pdca_init_channel(AIC23B_SSC_TX_PDCA_CHANNEL, &aic23b_ssc_pdca_options_tx);
01371 pdca_enable(AIC23B_SSC_TX_PDCA_CHANNEL);
01372
01373
01374 aic23b_configure_freq(master_clock, sample_rate_hz);
01375
01376 aic23b_daif_t daif;
01377 daif.data = AIC23B_DEFAULT(AIC23B_DAIF);
01378 daif.ms = AIC23B_DAIF_MS_SLAVE;
01379 daif.lrswap = swap_channels;
01380 daif.lrp = 0;
01381 daif.iwl = (bits_per_sample <= 16) ? AIC23B_DAIF_IWL_16 :
01382 (bits_per_sample <= 20) ? AIC23B_DAIF_IWL_20 :
01383 (bits_per_sample <= 24) ? AIC23B_DAIF_IWL_24 :
01384 AIC23B_DAIF_IWL_32;
01385 daif.fmt = AIC23B_DAIF_FMT_I2S;
01386 aic23b_write_reg(AIC23B_DAIF, daif.data);
01387
01388 aic23b_output_params.num_channels = num_channels;
01389 aic23b_output_params.callback = callback;
01390 aic23b_output_params.callback_opt = callback_opt;
01391 }
01392
01393 void aic23b_codec_flush(void)
01394 {
01395 pdca_disable_interrupt_transfer_complete(AIC23B_SSC_RX_PDCA_CHANNEL);
01396 while (!(pdca_get_transfer_status(AIC23B_SSC_RX_PDCA_CHANNEL) &
01397 PDCA_TRANSFER_COMPLETE));
01398 pdca_disable_interrupt_transfer_complete(AIC23B_SSC_TX_PDCA_CHANNEL);
01399 while (!(pdca_get_transfer_status(AIC23B_SSC_TX_PDCA_CHANNEL) &
01400 PDCA_TRANSFER_COMPLETE));
01401 }
01402
01403 void aic23b_codec_stop(void)
01404 {
01405 aic23b_codec_flush();
01406
01407 aic23b_reset();
01408
01409 aic23b_pdc_t pdc;
01410 pdc.data = AIC23B_DEFAULT(AIC23B_PDC);
01411 pdc.off = 1;
01412 pdc.clk = 1;
01413 pdc.osc = 1;
01414 pdc.out = 1;
01415 pdc.dac = 1;
01416 pdc.adc = 1;
01417 pdc.mic = 1;
01418 pdc.line = 1;
01419 aic23b_set_power_down_state(pdc);
01420
01421 pdca_disable(AIC23B_SSC_RX_PDCA_CHANNEL);
01422 pdca_disable(AIC23B_SSC_TX_PDCA_CHANNEL);
01423
01424 ssc_i2s_reset(AIC23B_SSC);
01425
01426 gpio_enable_gpio(AIC23B_SSC_CODEC_GPIO_MAP,
01427 sizeof(AIC23B_SSC_CODEC_GPIO_MAP) / sizeof(AIC23B_SSC_CODEC_GPIO_MAP[0]));
01428
01429 aic23b_output_params.num_channels = 0;
01430 aic23b_output_params.callback = NULL;
01431 aic23b_output_params.callback_opt = 0;
01432 }
01433 #endif
01434