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00043 #include "sdramc_at32ap7000.h"
00044 #include "mt481c2m32b2tg.h"
00045 #include "pm_at32ap7000.h"
00046 #include "board.h"
00047 #include "gpio.h"
00048
00049 static void sdramc_enable_muxed_pins(void)
00050 {
00051 volatile avr32_hmatrix_t *hmatrix = &AVR32_HMATRIX;
00052
00053
00054 hmatrix->sfr[4] |= 0x0002;
00055 hmatrix->sfr[4] |= 0x0100;
00056
00057 static const gpio_map_t SDRAMC_EBI_GPIO_MAP =
00058 {
00059
00060 {AVR32_EBI_DATA_16_PIN, AVR32_EBI_DATA_16_FUNCTION },
00061 {AVR32_EBI_DATA_17_PIN, AVR32_EBI_DATA_17_FUNCTION },
00062 {AVR32_EBI_DATA_18_PIN, AVR32_EBI_DATA_18_FUNCTION },
00063 {AVR32_EBI_DATA_19_PIN, AVR32_EBI_DATA_19_FUNCTION },
00064 {AVR32_EBI_DATA_20_PIN, AVR32_EBI_DATA_20_FUNCTION },
00065 {AVR32_EBI_DATA_21_PIN, AVR32_EBI_DATA_21_FUNCTION },
00066 {AVR32_EBI_DATA_22_PIN, AVR32_EBI_DATA_22_FUNCTION },
00067 {AVR32_EBI_DATA_23_PIN, AVR32_EBI_DATA_23_FUNCTION },
00068 {AVR32_EBI_DATA_24_PIN, AVR32_EBI_DATA_24_FUNCTION },
00069 {AVR32_EBI_DATA_25_PIN, AVR32_EBI_DATA_25_FUNCTION },
00070 {AVR32_EBI_DATA_26_PIN, AVR32_EBI_DATA_26_FUNCTION },
00071 {AVR32_EBI_DATA_27_PIN, AVR32_EBI_DATA_27_FUNCTION },
00072 {AVR32_EBI_DATA_28_PIN, AVR32_EBI_DATA_28_FUNCTION },
00073 {AVR32_EBI_DATA_29_PIN, AVR32_EBI_DATA_29_FUNCTION },
00074 {AVR32_EBI_DATA_30_PIN, AVR32_EBI_DATA_30_FUNCTION },
00075 {AVR32_EBI_DATA_31_PIN, AVR32_EBI_DATA_31_FUNCTION }
00076 };
00077
00078 gpio_enable_module(SDRAMC_EBI_GPIO_MAP, sizeof(SDRAMC_EBI_GPIO_MAP) / sizeof(SDRAMC_EBI_GPIO_MAP[0]));
00079 };
00080
00081 static void sdram_delay(int tics)
00082 {
00083 int i, loop_limit;
00084
00085 loop_limit = tics * 20;
00086
00087 for (i=0; i<loop_limit;i++);
00088
00089 }
00090
00091 void sdramc_init( void )
00092 {
00093
00094 volatile avr32_sdramc_t *sdramc = &AVR32_SDRAMC;
00095 volatile U32 *sdram = (void *) BOARD_SDRAM_BASE;
00096 U32 dummy_read;
00097 U32 i;
00098 U32 bus_hz;
00099
00100 sdramc_enable_muxed_pins();
00101
00102
00103 sdramc->cr = ( (SDRAM_COL_BITS - 8) << AVR32_SDRAMC_CR_NC ) |
00104 ( (SDRAM_ROW_BITS - 11) << AVR32_SDRAMC_CR_NR ) |
00105 ( (SDRAM_BANK_BITS - 1) << AVR32_SDRAMC_CR_NB ) |
00106 ( SDRAM_CAS << AVR32_SDRAMC_CR_CAS ) |
00107 ( SDRAM_TWR << AVR32_SDRAMC_CR_TWR ) |
00108 ( SDRAM_TRC << AVR32_SDRAMC_CR_TRC ) |
00109 ( SDRAM_TRP << AVR32_SDRAMC_CR_TRP ) |
00110 ( SDRAM_TRCD << AVR32_SDRAMC_CR_TRCD ) |
00111 ( SDRAM_TRAS << AVR32_SDRAMC_CR_TRAS ) |
00112 ( SDRAM_TXSR << AVR32_SDRAMC_CR_TXSR );
00113
00114 sdram_delay(200);
00115
00116
00117 sdramc->mr = MODE_PRECHARGE;
00118 dummy_read = sdramc->mr;
00119 sdram[0] = 0;
00120
00121
00122 sdramc->mr = MODE_AUTOREFRESH;
00123 dummy_read = sdramc->mr;
00124 for (i = 0; i < 8; i++)
00125 sdram[0] = 0;
00126
00127
00128
00129
00130
00131
00132 sdramc->mr = MODE_LOAD_MR;
00133 dummy_read = sdramc->mr;
00134 sdram[0x020] = 0;
00135
00136
00137 dummy_read = sdramc->mr;
00138 sdramc->mr = MODE_NORMAL;
00139 dummy_read = sdramc->mr;
00140 sdram[0] = 0;
00141
00142
00143 bus_hz = pm_read_module_frequency_hz(PM_PBB_HSDRAMC);
00144 sdramc->tr = ( ( 156 * (bus_hz / 1000) ) / 10000 );
00145
00146 }