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00047 #include <avr32/io.h>
00048 #include "compiler.h"
00049 #include "scif_uc3c.h"
00050 #include "ast.h"
00051
00052 int ast_is_busy(volatile avr32_ast_t *ast)
00053 {
00054 return (ast->sr & AVR32_AST_SR_BUSY_MASK) != 0;
00055 }
00056
00057 int ast_is_clkbusy(volatile avr32_ast_t *ast)
00058 {
00059 return (ast->sr & AVR32_AST_SR_CLKBUSY_MASK) != 0;
00060 }
00061
00062 int ast_init_calendar(volatile avr32_ast_t *ast,
00063 unsigned char osc_type,
00064 unsigned char psel,
00065 ast_calendar_t ast_calendar)
00066 {
00067 scif_osc32_opt_t opt;
00068 opt.mode = SCIF_OSC_MODE_2PIN_CRYSTAL;
00069 opt.startup = AVR32_SCIF_OSCCTRL32_STARTUP_0_RCOSC;
00070
00071
00072 if (osc_type == AST_OSC_32KHZ)
00073 {
00074 scif_start_osc32(&opt,true);
00075 }
00076
00077 while (ast_is_clkbusy(ast));
00078 ast->clock = AVR32_AST_CLOCK_CEN_MASK |
00079 osc_type << AVR32_AST_CLOCK_CSSEL_OFFSET;
00080
00081
00082 ast->cr = AST_MODE_CALENDAR << AVR32_AST_CR_CAL_OFFSET |
00083 psel << AVR32_AST_CR_PSEL_OFFSET ;
00084
00085
00086 while (ast_is_busy(ast));
00087
00088
00089 ast_set_calendar_value(ast, ast_calendar);
00090
00091 return 1;
00092 }
00093
00094 int ast_init_counter(volatile avr32_ast_t *ast,
00095 unsigned char osc_type,
00096 unsigned char psel,
00097 unsigned long ast_counter)
00098 {
00099 scif_osc32_opt_t opt;
00100 opt.mode = SCIF_OSC_MODE_2PIN_CRYSTAL;
00101 opt.startup = AVR32_SCIF_OSCCTRL32_STARTUP_0_RCOSC;
00102
00103
00104 if (osc_type == AST_OSC_32KHZ)
00105 {
00106 scif_start_osc32(&opt,true);
00107 }
00108
00109 while (ast_is_clkbusy(ast));
00110 ast->clock = AVR32_AST_CLOCK_CEN_MASK |
00111 osc_type << AVR32_AST_CLOCK_CSSEL_OFFSET;
00112
00113
00114 ast->cr = AST_MODE_COUNTER << AVR32_AST_CR_CAL_OFFSET |
00115 psel << AVR32_AST_CR_PSEL_OFFSET ;
00116
00117
00118 while (ast_is_busy(ast));
00119
00120
00121 ast_set_counter_value(ast, ast_counter);
00122
00123 return 1;
00124 }
00125
00126
00127 void ast_enable(volatile avr32_ast_t *ast)
00128 {
00129
00130 while (ast_is_busy(ast));
00131
00132 ast->cr |= AVR32_AST_CR_EN_MASK;
00133
00134 while (ast_is_busy(ast));
00135 }
00136
00137 void ast_set_calendar_value(volatile avr32_ast_t *ast,
00138 ast_calendar_t ast_calendar)
00139 {
00140
00141 while (ast_is_busy(ast));
00142
00143 ast->calv = ast_calendar.field;
00144
00145 while (ast_is_busy(ast));
00146 }
00147
00148 void ast_set_counter_value(volatile avr32_ast_t *ast,
00149 unsigned long ast_counter)
00150 {
00151
00152 while (ast_is_busy(ast));
00153
00154 ast->cv = ast_counter;
00155
00156 while (ast_is_busy(ast));
00157 }
00158
00159
00160 ast_calendar_t ast_get_calendar_value(volatile avr32_ast_t *ast)
00161 {
00162 ast_calendar_t ast_calendar;
00163 ast_calendar.field = ast->calv;
00164 return ast_calendar;
00165 }
00166
00167 unsigned long ast_get_counter_value(volatile avr32_ast_t *ast)
00168 {
00169 return ast->cv;
00170 }
00171
00172 void ast_set_alarm0_value(volatile avr32_ast_t *ast,
00173 ast_calendar_t ast_alarm)
00174 {
00175
00176 ast->ar0 = ast_alarm.field;
00177 }
00178
00179 void ast_set_alarm1_value(volatile avr32_ast_t *ast,
00180 ast_calendar_t ast_alarm)
00181 {
00182
00183 ast->ar1 = ast_alarm.field;
00184 }
00185
00186 void ast_enable_alarm0(volatile avr32_ast_t *ast)
00187 {
00188
00189 while (ast_is_busy(ast));
00190
00191 ast->eve |= AVR32_AST_EVE_ALARM0_MASK;
00192
00193 while (ast_is_busy(ast));
00194 }
00195
00196 void ast_disable_alarm0(volatile avr32_ast_t *ast)
00197 {
00198
00199 while (ast_is_busy(ast));
00200
00201 ast->evd |= AVR32_AST_EVE_ALARM0_MASK;
00202
00203 while (ast_is_busy(ast));
00204 }
00205
00206 void ast_enable_alarm1(volatile avr32_ast_t *ast)
00207 {
00208
00209 while (ast_is_busy(ast));
00210
00211 ast->eve |= AVR32_AST_EVE_ALARM1_MASK;
00212
00213 while (ast_is_busy(ast));
00214 }
00215
00216 void ast_disable_alarm1(volatile avr32_ast_t *ast)
00217 {
00218
00219 while (ast_is_busy(ast));
00220
00221 ast->evd |= AVR32_AST_EVE_ALARM1_MASK;
00222
00223 while (ast_is_busy(ast));
00224 }
00225
00226 void ast_set_periodic0_value(volatile avr32_ast_t *ast,
00227 avr32_ast_pir0_t pir)
00228 {
00229
00230 ast->PIR0 = pir;
00231 }
00232
00233 void ast_set_periodic1_value(volatile avr32_ast_t *ast,
00234 avr32_ast_pir1_t pir)
00235 {
00236
00237 ast->PIR1 = pir;
00238 }
00239
00240 void ast_enable_periodic0(volatile avr32_ast_t *ast)
00241 {
00242
00243 while (ast_is_busy(ast));
00244
00245 ast->eve |= AVR32_AST_EVE_PER0_MASK;
00246
00247 while (ast_is_busy(ast));
00248 }
00249
00250 void ast_disable_periodic0(volatile avr32_ast_t *ast)
00251 {
00252
00253 while (ast_is_busy(ast));
00254
00255 ast->evd |= AVR32_AST_EVE_PER0_MASK;
00256
00257 while (ast_is_busy(ast));
00258 }
00259
00260 void ast_enable_periodic1(volatile avr32_ast_t *ast)
00261 {
00262
00263 while (ast_is_busy(ast));
00264
00265 ast->eve |= AVR32_AST_EVE_PER1_MASK;
00266
00267 while (ast_is_busy(ast));
00268 }
00269
00270 void ast_disable_periodic1(volatile avr32_ast_t *ast)
00271 {
00272
00273 while (ast_is_busy(ast));
00274
00275 ast->evd |= AVR32_AST_EVE_PER0_MASK;
00276
00277 while (ast_is_busy(ast));
00278 }
00279