mdma_example.c File Reference


Detailed Description

MDMA Example for AVR32 MDMA driver module.

Author:
Atmel Corporation: http://www.atmel.com
Support and FAQ: http://support.atmel.no/

Definition in file mdma_example.c.

#include "intc.h"
#include "power_clocks_lib.h"
#include "gpio.h"
#include "usart.h"
#include "mdma.h"
#include "board.h"
#include "sdramc.h"
#include "flashc_buffer.h"
#include "cycle_counter.h"
#include "print_funcs.h"

Go to the source code of this file.

Defines

#define BUFFER_SIZE   1024
 Buffer Size.
#define BURST_MODE   MDMA_SINGLE_TRANSFERT_MODE
 Burst Mode : Single.
#define CHANNEL_NBR   0
 Number of MDMA channel used.
#define FCPU_HZ   48000000
 CPU Clock at 48MHz.
#define FPBA_HZ   24000000
 PBA Clock at 48MHz.
#define FPBB_HZ   48000000
 PBB Clock at 48MHz.
#define TRANSFERT_SIZE   MDMA_TRANSFERT_SIZE_WORD
 Transfert Size: Word.
Configuration to use for the example
#define EXAMPLE_MDMA_LED_ERRORS   (LED0 | LED1 | LED2 | LED3)
#define EXAMPLE_MDMA_LED_OK   (LED0 | LED1 | LED2 | LED3)
#define EXAMPLE_MDMA_LED_READ   LED1
#define EXAMPLE_MDMA_USART   (&AVR32_USART2)
#define EXAMPLE_MDMA_USART_RX_FUNCTION   AVR32_USART2_RXD_0_1_FUNCTION
#define EXAMPLE_MDMA_USART_RX_PIN   AVR32_USART2_RXD_0_1_PIN
#define EXAMPLE_MDMA_USART_TX_FUNCTION   AVR32_USART2_TXD_0_1_FUNCTION
#define EXAMPLE_MDMA_USART_TX_PIN   AVR32_USART2_TXD_0_1_PIN

Functions

void init_usart (void)
int main (void)
void mdma_init_buffer_descriptor (void)
 Initialize the MDMA buffer descriptor.
static void mdma_int_handler (void)
 Interrupt for End of MDMA Transfer.

Variables

volatile avr32_mdma_t * mdma = &AVR32_MDMA
mdma_descriptor_t mdma_buf_desc [5]
System Clock Frequencies
Initializes the MCU system clocks.

U32 sram_buffer [BUFFER_SIZE]


Define Documentation

#define BUFFER_SIZE   1024

Buffer Size.

Definition at line 114 of file mdma_example.c.

Referenced by mdma_init_buffer_descriptor().

#define BURST_MODE   MDMA_SINGLE_TRANSFERT_MODE

Burst Mode : Single.

Definition at line 116 of file mdma_example.c.

Referenced by mdma_init_buffer_descriptor().

#define CHANNEL_NBR   0

Number of MDMA channel used.

Definition at line 113 of file mdma_example.c.

Referenced by main().

#define EXAMPLE_MDMA_LED_ERRORS   (LED0 | LED1 | LED2 | LED3)

Definition at line 128 of file mdma_example.c.

Referenced by main().

#define EXAMPLE_MDMA_LED_OK   (LED0 | LED1 | LED2 | LED3)

Definition at line 129 of file mdma_example.c.

Referenced by main().

#define EXAMPLE_MDMA_LED_READ   LED1

Definition at line 127 of file mdma_example.c.

Referenced by main().

#define EXAMPLE_MDMA_USART   (&AVR32_USART2)

Definition at line 122 of file mdma_example.c.

Referenced by init_usart().

#define EXAMPLE_MDMA_USART_RX_FUNCTION   AVR32_USART2_RXD_0_1_FUNCTION

Definition at line 124 of file mdma_example.c.

Referenced by init_usart().

#define EXAMPLE_MDMA_USART_RX_PIN   AVR32_USART2_RXD_0_1_PIN

Definition at line 123 of file mdma_example.c.

Referenced by init_usart().

#define EXAMPLE_MDMA_USART_TX_FUNCTION   AVR32_USART2_TXD_0_1_FUNCTION

Definition at line 126 of file mdma_example.c.

Referenced by init_usart().

#define EXAMPLE_MDMA_USART_TX_PIN   AVR32_USART2_TXD_0_1_PIN

Definition at line 125 of file mdma_example.c.

Referenced by init_usart().

#define FCPU_HZ   48000000

CPU Clock at 48MHz.

Definition at line 108 of file mdma_example.c.

#define FPBA_HZ   24000000

PBA Clock at 48MHz.

Definition at line 109 of file mdma_example.c.

Referenced by init_usart().

#define FPBB_HZ   48000000

PBB Clock at 48MHz.

Definition at line 110 of file mdma_example.c.

Referenced by main().

#define TRANSFERT_SIZE   MDMA_TRANSFERT_SIZE_WORD

Transfert Size: Word.

Definition at line 115 of file mdma_example.c.

Referenced by mdma_init_buffer_descriptor().


Function Documentation

void init_usart ( void   ) 

Definition at line 153 of file mdma_example.c.

References EXAMPLE_MDMA_USART, EXAMPLE_MDMA_USART_RX_FUNCTION, EXAMPLE_MDMA_USART_RX_PIN, EXAMPLE_MDMA_USART_TX_FUNCTION, EXAMPLE_MDMA_USART_TX_PIN, and FPBA_HZ.

Referenced by main().

00154 {
00155   static const gpio_map_t USART_GPIO_MAP =
00156   {
00157     {EXAMPLE_MDMA_USART_RX_PIN, EXAMPLE_MDMA_USART_RX_FUNCTION},
00158     {EXAMPLE_MDMA_USART_TX_PIN, EXAMPLE_MDMA_USART_TX_FUNCTION}
00159   };
00160 
00161   // USART options.
00162   static const usart_options_t USART_OPTIONS =
00163   {
00164     .baudrate     = 57600,
00165     .charlength   = 8,
00166     .paritytype   = USART_NO_PARITY,
00167     .stopbits     = USART_1_STOPBIT,
00168     .channelmode  = USART_NORMAL_CHMODE
00169   };
00170 
00171   // Assign GPIO to USART.
00172   gpio_enable_module(USART_GPIO_MAP,
00173                      sizeof(USART_GPIO_MAP) / sizeof(USART_GPIO_MAP[0]));
00174 
00175   // Initialize USART in RS232 mode.
00176   usart_init_rs232(EXAMPLE_MDMA_USART, &USART_OPTIONS, FPBA_HZ);
00177 
00178   print_dbg("MDMA Example : This example demonstrates how to use the MDMA driver. \n");
00179 }

int main ( void   ) 

Definition at line 322 of file mdma_example.c.

References CHANNEL_NBR, EXAMPLE_MDMA_LED_ERRORS, EXAMPLE_MDMA_LED_OK, EXAMPLE_MDMA_LED_READ, flashc_data, FLASHC_DATA_BUFFER_SIZE, FPBB_HZ, init_usart(), mdma, mdma_configure_interrupts(), mdma_descriptor_mode_xfert_init(), MDMA_FIXED_PRIORITY_MODE, mdma_init_buffer_descriptor(), mdma_int_handler(), and mdma_start_descriptor_xfert().

00322 {
00323   int i;
00324   unsigned long noErrors = 0;
00325   volatile unsigned char *sdram = SDRAM;
00326 
00327   // Enable Channel 0 complete Interrupt
00328   static const mdma_interrupt_t MDMA_INTERRUPT =
00329   {
00330     .ch0c = 1, 
00331   };
00332 
00333   // Initialize System Clock
00334   init_sys_clocks();
00335 
00336   // Initialize USART for Debug
00337   init_usart();  
00338 
00339   // Initialize the external SDRAM chip.
00340   sdramc_init(FPBB_HZ);
00341   print_dbg("SDRAM initialized...\n");
00342 
00343   gpio_set_gpio_pin(LED0_GPIO);
00344   gpio_set_gpio_pin(LED1_GPIO);
00345   gpio_set_gpio_pin(LED2_GPIO);
00346   gpio_set_gpio_pin(LED3_GPIO);
00347 
00348   // Initialize MDMA Buffer Descriptor.
00349   mdma_init_buffer_descriptor();
00350   
00351   Disable_global_interrupt();
00352 
00353   // Initialize interrupt vectors.
00354   INTC_init_interrupts();
00355 
00356   // Register the MDMA interrupt handler to the interrupt controller.
00357   INTC_register_interrupt(&mdma_int_handler, AVR32_MDMA_IRQ, AVR32_INTC_INT0);
00358 
00359   // Enable global interrupt
00360   Enable_global_interrupt();
00361 
00362   // Initialize MDMA Transfert.
00363   mdma_descriptor_mode_xfert_init(mdma,CHANNEL_NBR,(U32*)&mdma_buf_desc);
00364 
00365   // Configure MDMA Interrupts.  
00366   mdma_configure_interrupts(mdma, &MDMA_INTERRUPT);    
00367 
00368   print_dbg("MDMA initialized...\n");
00369 
00370   // Clear SDRAM area
00371   for (i=0;i<FLASHC_DATA_BUFFER_SIZE;i++)
00372   {
00373     sdram[i] = 0;
00374   }
00375   
00376   // Start MDMA Transfert.
00377   mdma_start_descriptor_xfert(mdma,CHANNEL_NBR,MDMA_FIXED_PRIORITY_MODE);
00378 
00379   print_dbg("Start MDMA Transfert...\n");
00380 
00381   // Wait end of transfert for Descriptor 4
00382   while (mdma_buf_desc[4].ccr.V==1);
00383 
00384   print_dbg("End of MDMA Transfert, check transfert on last transfert ...\n");
00385 
00386   // Check content inside the buffer of descriptor 4  
00387   for (i=0;i<FLASHC_DATA_BUFFER_SIZE;i++)
00388   {
00389     if (sdram[i] != flashc_data[i])
00390     {
00391       noErrors++;
00392     }
00393   }
00394 
00395   LED_Off(EXAMPLE_MDMA_LED_READ);
00396   print_dbg_ulong(noErrors);
00397   print_dbg(" corrupted word(s)       \n");
00398   if (noErrors)
00399   {
00400     LED_Off(EXAMPLE_MDMA_LED_ERRORS);
00401     while (1)
00402     {
00403       LED_Toggle(EXAMPLE_MDMA_LED_ERRORS);
00404       cpu_delay_ms(200, FOSC0);   // Fast blink means errors.
00405     }
00406   }
00407   else
00408   {
00409     LED_Off(EXAMPLE_MDMA_LED_OK);
00410     while (1)
00411     {
00412       LED_Toggle(EXAMPLE_MDMA_LED_OK);
00413       cpu_delay_ms(1000, FOSC0);  // Slow blink means OK.
00414     }
00415   }
00416 
00417 }
00418 }

void mdma_init_buffer_descriptor ( void   ) 

Initialize the MDMA buffer descriptor.

Definition at line 215 of file mdma_example.c.

References BUFFER_SIZE, BURST_MODE, mdma_opt_t::burst_size, mdma_descriptor_t::ccr, mdma_opt_t::count, mdma_descriptor_t::dest, flashc_data, mdma_opt_t::L, mdma_opt_t::size, mdma_descriptor_t::src, mdma_opt_t::tc_ienable, TRANSFERT_SIZE, and mdma_opt_t::V.

Referenced by main().

00216 {
00217   // First MDMA Descriptor
00218   // Source : Flash
00219   // Destination : SDRAM
00220   // Size : BUFFER_SIZE
00221   // Transfert Size: TRANSFERT_SIZE
00222   // Mode : BURST_MODE
00223   // Interrupt : 1 (Enable)
00224   // Valid : 1 (TRUE)
00225   // Last : 0 (FALSE)
00226   mdma_buf_desc[0].src            = (U32)flashc_data;             // First MDMA Descriptor
00227   mdma_buf_desc[0].src            = (U32)flashc_data;             // Source : Flash
00228   mdma_buf_desc[0].dest           = (U32)AVR32_EBI_CS1_0_ADDRESS; // Destination : SDRAM
00229   mdma_buf_desc[0].ccr.count      = BUFFER_SIZE;                  // Size : BUFFER_SIZE
00230   mdma_buf_desc[0].ccr.size       = TRANSFERT_SIZE;               // Transfert Size: TRANSFERT_SIZE
00231   mdma_buf_desc[0].ccr.burst_size = BURST_MODE;                   // Mode : BURST_MODE
00232   mdma_buf_desc[0].ccr.tc_ienable = 1;                            // Interrupt : 1 (Enable)
00233   mdma_buf_desc[0].ccr.V          = 1;                            // Valid : 1 (TRUE)
00234   mdma_buf_desc[0].ccr.L          = 0;                            // Last : 0 (FALSE)
00235 
00236   mdma_buf_desc[0].src             = (U32)((unsigned short *)flashc_data);
00237   mdma_buf_desc[0].src             = (U32)((unsigned short *)flashc_data);
00238   mdma_buf_desc[0].dest            = (U32)((unsigned short *)AVR32_EBI_CS1_0_ADDRESS);
00239   mdma_buf_desc[0].ccr.count       = BUFFER_SIZE;
00240   mdma_buf_desc[0].ccr.size        = TRANSFERT_SIZE;
00241   mdma_buf_desc[0].ccr.burst_size  = BURST_MODE;
00242   mdma_buf_desc[0].ccr.tc_ienable  = 1;
00243   mdma_buf_desc[0].ccr.V           = 1;
00244   mdma_buf_desc[0].ccr.L           = 0; 
00245 
00246   // Second MDMA Descriptor
00247   // Source : SDRAM
00248   // Destination : HSB Ram
00249   // Size : BUFFER_SIZE
00250   // Transfert Size: TRANSFERT_SIZE
00251   // Mode : BURST_MODE
00252   // Interrupt : 1 (Enable)
00253   // Valid : 1 (TRUE)
00254   // Last : 0 (FALSE)
00255   mdma_buf_desc[1].src             = (U32)((unsigned short *)AVR32_EBI_CS1_0_ADDRESS);
00256   mdma_buf_desc[1].dest            = (U32)((unsigned short *)AVR32_HRAMC0_ADDRESS);
00257   mdma_buf_desc[1].ccr.count       = BUFFER_SIZE;
00258   mdma_buf_desc[1].ccr.size        = TRANSFERT_SIZE;
00259   mdma_buf_desc[1].ccr.burst_size  = BURST_MODE;
00260   mdma_buf_desc[1].ccr.tc_ienable  = 1;
00261   mdma_buf_desc[1].ccr.V           = 1;
00262   mdma_buf_desc[1].ccr.L           = 0; 
00263 
00264   // Third MDMA Descriptor
00265   // Source : HSB Ram
00266   // Destination : CPU Ram
00267   // Size : BUFFER_SIZE
00268   // Transfert Size: TRANSFERT_SIZE
00269   // Mode : BURST_MODE
00270   // Interrupt : 1 (Enable)
00271   // Valid : 1 (TRUE)
00272   // Last : 0 (FALSE)  
00273   mdma_buf_desc[2].src             = (U32)((unsigned short *)AVR32_HRAMC0_ADDRESS);
00274   mdma_buf_desc[2].dest            = (U32)sram_buffer;
00275   mdma_buf_desc[2].ccr.count       = BUFFER_SIZE;
00276   mdma_buf_desc[2].ccr.size        = TRANSFERT_SIZE;
00277   mdma_buf_desc[2].ccr.burst_size  = BURST_MODE;
00278   mdma_buf_desc[2].ccr.tc_ienable  = 1;
00279   mdma_buf_desc[2].ccr.V           = 1;
00280   mdma_buf_desc[2].ccr.L           = 0;
00281 
00282   // Fourth MDMA Descriptor
00283   // Source : CPU Ram
00284   // Destination : HSB Ram
00285   // Size : BUFFER_SIZE
00286   // Transfert Size: TRANSFERT_SIZE
00287   // Mode : BURST_MODE
00288   // Interrupt : 1 (Enable)
00289   // Valid : 1 (TRUE)
00290   // Last : 0 (FALSE)   
00291   mdma_buf_desc[3].src             = (U32)((unsigned short *)sram_buffer);
00292   mdma_buf_desc[3].dest            = (U32)AVR32_HRAMC0_ADDRESS;
00293   mdma_buf_desc[3].ccr.count       = BUFFER_SIZE;
00294   mdma_buf_desc[3].ccr.size        = TRANSFERT_SIZE;
00295   mdma_buf_desc[3].ccr.burst_size  = BURST_MODE;
00296   mdma_buf_desc[3].ccr.tc_ienable  = 1;
00297   mdma_buf_desc[3].ccr.V           = 1;
00298   mdma_buf_desc[3].ccr.L           = 0;  
00299 
00300   // Fifth MDMA Descriptor
00301   // Source : HSB Ram
00302   // Destination : SDRAM
00303   // Size : BUFFER_SIZE
00304   // Transfert Size: TRANSFERT_SIZE
00305   // Mode : BURST_MODE
00306   // Interrupt : 1 (Enable)
00307   // Valid : 1 (TRUE)
00308   // Last : 1 (TRUE) 
00309   mdma_buf_desc[4].src             = (U32)((unsigned short *)AVR32_HRAMC0_ADDRESS);
00310   mdma_buf_desc[4].dest            = (U32)AVR32_EBI_CS1_0_ADDRESS;
00311   mdma_buf_desc[4].ccr.count       = BUFFER_SIZE;
00312   mdma_buf_desc[4].ccr.size        = TRANSFERT_SIZE;
00313   mdma_buf_desc[4].ccr.burst_size  = BURST_MODE;
00314   mdma_buf_desc[4].ccr.tc_ienable  = 1;
00315   mdma_buf_desc[4].ccr.V           = 1;
00316   mdma_buf_desc[4].ccr.L           = 1;
00317 
00318 }
00319 

static void mdma_int_handler ( void   )  [static]

Interrupt for End of MDMA Transfer.

Definition at line 145 of file mdma_example.c.

References mdma.

Referenced by main().

00146 {
00147   Disable_global_interrupt();
00148   U32 status = mdma->isr;
00149   mdma->icr = status;
00150   Enable_global_interrupt();  
00151 }


Variable Documentation

volatile avr32_mdma_t* mdma = &AVR32_MDMA

Definition at line 136 of file mdma_example.c.

Referenced by main(), and mdma_int_handler().

Definition at line 210 of file mdma_example.c.

U32 sram_buffer[BUFFER_SIZE]

Definition at line 207 of file mdma_example.c.


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