This file contains definitions and services for the AVR32 WatchDog Timer.
Definition in file wdt4.c.
#include <avr32/io.h>
#include "compiler.h"
#include "board.h"
#include "wdt4.h"
Go to the source code of this file.
Defines | |
#define | MAX_US_TIMEBAN_PERIOD_OSC32K (((1ULL << (1 << AVR32_WDT_CTRL_TBAN_SIZE)) * 1000000 + AVR32_SCIF_OSC32_FREQUENCY / 2) / AVR32_SCIF_OSC32_FREQUENCY) |
#define | MAX_US_TIMEBAN_PERIOD_RCSYS (((1ULL << (1 << AVR32_WDT_CTRL_TBAN_SIZE)) * 1000000 + AVR32_SCIF_RCOSC_FREQUENCY / 2) / AVR32_SCIF_RCOSC_FREQUENCY) |
#define | MAX_US_TIMEOUT_PERIOD_OSC32K (((1ULL << (1 << AVR32_WDT_CTRL_PSEL_SIZE)) * 1000000 + AVR32_SCIF_OSC32_FREQUENCY / 2) / AVR32_SCIF_OSC32_FREQUENCY) |
#define | MAX_US_TIMEOUT_PERIOD_RCSYS (((1ULL << (1 << AVR32_WDT_CTRL_PSEL_SIZE)) * 1000000 + AVR32_SCIF_RCOSC_FREQUENCY / 2) / AVR32_SCIF_RCOSC_FREQUENCY) |
#define | MIN_US_TIMEBAN_PERIOD_OSC32K (((1ULL << 1 ) * 1000000 + AVR32_SCIF_OSC32_FREQUENCY / 2) / AVR32_SCIF_OSC32_FREQUENCY) |
#define | MIN_US_TIMEBAN_PERIOD_RCSYS (((1ULL << 1 ) * 1000000 + AVR32_SCIF_RCOSC_FREQUENCY / 2) / AVR32_SCIF_RCOSC_FREQUENCY) |
#define | MIN_US_TIMEOUT_PERIOD_OSC32K (((1ULL << 1 ) * 1000000 + AVR32_SCIF_OSC32_FREQUENCY / 2) / AVR32_SCIF_OSC32_FREQUENCY) |
#define | MIN_US_TIMEOUT_PERIOD_RCSYS (((1ULL << 1 ) * 1000000 + AVR32_SCIF_RCOSC_FREQUENCY / 2) / AVR32_SCIF_RCOSC_FREQUENCY) |
Functions | |
void | wdt_clear (void) |
Clears the WatchDog Timer. | |
void | wdt_disable (void) |
Disables the WatchDog Timer. | |
unsigned long long | wdt_enable (wdt_opt_t *opt) |
Enables the WatchDog Timer with the us_timeout_period time-out period saturated to the supported range and rounded up to the nearest supported greater time-out period. | |
long long | wdt_get_us_timeban_period (wdt_opt_t *opt) |
Gets the timeban period of the WatchDog Timer in microseconds. | |
long long | wdt_get_us_timeout_period (wdt_opt_t *opt) |
Gets the time-out period of the WatchDog Timer in microseconds. | |
void | wdt_reenable (void) |
Re-enables the WatchDog Timer with the last time-out period configured. | |
void | wdt_reset_mcu (void) |
Resets the MCU with the WatchDog Timer as fast as possible. | |
static void | wdt_set_ctrl (unsigned long ctrl) |
Sets the WatchDog Timer Control register to the ctrl value thanks to the WatchDog Timer key. |
#define MAX_US_TIMEBAN_PERIOD_OSC32K (((1ULL << (1 << AVR32_WDT_CTRL_TBAN_SIZE)) * 1000000 + AVR32_SCIF_OSC32_FREQUENCY / 2) / AVR32_SCIF_OSC32_FREQUENCY) |
Referenced by wdt_enable().
#define MAX_US_TIMEBAN_PERIOD_RCSYS (((1ULL << (1 << AVR32_WDT_CTRL_TBAN_SIZE)) * 1000000 + AVR32_SCIF_RCOSC_FREQUENCY / 2) / AVR32_SCIF_RCOSC_FREQUENCY) |
Referenced by wdt_enable().
#define MAX_US_TIMEOUT_PERIOD_OSC32K (((1ULL << (1 << AVR32_WDT_CTRL_PSEL_SIZE)) * 1000000 + AVR32_SCIF_OSC32_FREQUENCY / 2) / AVR32_SCIF_OSC32_FREQUENCY) |
Referenced by wdt_enable().
#define MAX_US_TIMEOUT_PERIOD_RCSYS (((1ULL << (1 << AVR32_WDT_CTRL_PSEL_SIZE)) * 1000000 + AVR32_SCIF_RCOSC_FREQUENCY / 2) / AVR32_SCIF_RCOSC_FREQUENCY) |
Referenced by wdt_enable().
#define MIN_US_TIMEBAN_PERIOD_OSC32K (((1ULL << 1 ) * 1000000 + AVR32_SCIF_OSC32_FREQUENCY / 2) / AVR32_SCIF_OSC32_FREQUENCY) |
Referenced by wdt_enable().
#define MIN_US_TIMEBAN_PERIOD_RCSYS (((1ULL << 1 ) * 1000000 + AVR32_SCIF_RCOSC_FREQUENCY / 2) / AVR32_SCIF_RCOSC_FREQUENCY) |
Referenced by wdt_enable().
#define MIN_US_TIMEOUT_PERIOD_OSC32K (((1ULL << 1 ) * 1000000 + AVR32_SCIF_OSC32_FREQUENCY / 2) / AVR32_SCIF_OSC32_FREQUENCY) |
Referenced by wdt_enable().
#define MIN_US_TIMEOUT_PERIOD_RCSYS (((1ULL << 1 ) * 1000000 + AVR32_SCIF_RCOSC_FREQUENCY / 2) / AVR32_SCIF_RCOSC_FREQUENCY) |
Referenced by wdt_enable().
void wdt_clear | ( | void | ) |
void wdt_disable | ( | void | ) |
Disables the WatchDog Timer.
Definition at line 111 of file wdt4.c.
References wdt_set_ctrl().
00112 { 00113 wdt_set_ctrl(AVR32_WDT.ctrl & ~AVR32_WDT_CTRL_EN_MASK); 00114 }
unsigned long long wdt_enable | ( | wdt_opt_t * | opt | ) |
Enables the WatchDog Timer with the us_timeout_period time-out period saturated to the supported range and rounded up to the nearest supported greater time-out period.
opt | Structure for settings of WDT. |
Definition at line 117 of file wdt4.c.
References wdt_opt_t::cssel, wdt_opt_t::dar, wdt_opt_t::fcd, MAX_US_TIMEBAN_PERIOD_OSC32K, MAX_US_TIMEBAN_PERIOD_RCSYS, MAX_US_TIMEOUT_PERIOD_OSC32K, MAX_US_TIMEOUT_PERIOD_RCSYS, MIN_US_TIMEBAN_PERIOD_OSC32K, MIN_US_TIMEBAN_PERIOD_RCSYS, MIN_US_TIMEOUT_PERIOD_OSC32K, MIN_US_TIMEOUT_PERIOD_RCSYS, wdt_opt_t::mode, wdt_opt_t::sfv, wdt_opt_t::us_timeban_period, wdt_opt_t::us_timeout_period, WDT_CLOCK_SOURCE_SELECT_RCSYS, wdt_get_us_timeout_period(), and wdt_set_ctrl().
Referenced by wdt_reset_mcu(), and wdt_scheduler().
00118 { 00119 00120 #define MIN_US_TIMEOUT_PERIOD_RCSYS (((1ULL << 1 ) * 1000000 + AVR32_SCIF_RCOSC_FREQUENCY / 2) / AVR32_SCIF_RCOSC_FREQUENCY) 00121 #define MAX_US_TIMEOUT_PERIOD_RCSYS (((1ULL << (1 << AVR32_WDT_CTRL_PSEL_SIZE)) * 1000000 + AVR32_SCIF_RCOSC_FREQUENCY / 2) / AVR32_SCIF_RCOSC_FREQUENCY) 00122 #define MIN_US_TIMEOUT_PERIOD_OSC32K (((1ULL << 1 ) * 1000000 + AVR32_SCIF_OSC32_FREQUENCY / 2) / AVR32_SCIF_OSC32_FREQUENCY) 00123 #define MAX_US_TIMEOUT_PERIOD_OSC32K (((1ULL << (1 << AVR32_WDT_CTRL_PSEL_SIZE)) * 1000000 + AVR32_SCIF_OSC32_FREQUENCY / 2) / AVR32_SCIF_OSC32_FREQUENCY) 00124 00125 #define MIN_US_TIMEBAN_PERIOD_RCSYS (((1ULL << 1 ) * 1000000 + AVR32_SCIF_RCOSC_FREQUENCY / 2) / AVR32_SCIF_RCOSC_FREQUENCY) 00126 #define MAX_US_TIMEBAN_PERIOD_RCSYS (((1ULL << (1 << AVR32_WDT_CTRL_TBAN_SIZE)) * 1000000 + AVR32_SCIF_RCOSC_FREQUENCY / 2) / AVR32_SCIF_RCOSC_FREQUENCY) 00127 #define MIN_US_TIMEBAN_PERIOD_OSC32K (((1ULL << 1 ) * 1000000 + AVR32_SCIF_OSC32_FREQUENCY / 2) / AVR32_SCIF_OSC32_FREQUENCY) 00128 #define MAX_US_TIMEBAN_PERIOD_OSC32K (((1ULL << (1 << AVR32_WDT_CTRL_TBAN_SIZE)) * 1000000 + AVR32_SCIF_OSC32_FREQUENCY / 2) / AVR32_SCIF_OSC32_FREQUENCY) 00129 00130 00131 // RCOSC 00132 if (opt->cssel == WDT_CLOCK_SOURCE_SELECT_RCSYS) 00133 { 00134 // Set the CTRL.EN bit 00135 // Translate the us timeout to fit in CTRL.PSEL using the formula Twdt = 2pow(PSEL+1) / fRCosc 00136 // Translate the us timeban to fit in CTRL.PSEL using the formula Twdt = 2pow(PSEL+1) / fRCosc 00137 wdt_set_ctrl(AVR32_WDT_CTRL_EN_MASK | AVR32_WDT_CTRL_CEN_MASK | 00138 (opt->dar << AVR32_WDT_CTRL_DAR_OFFSET) | 00139 (opt->mode << AVR32_WDT_CTRL_MODE_OFFSET) | 00140 (opt->sfv << AVR32_WDT_CTRL_SFV_OFFSET) | 00141 (opt->fcd << AVR32_WDT_CTRL_FCD_OFFSET) | 00142 (opt->cssel << AVR32_WDT_CTRL_CSSEL_OFFSET) | 00143 ((32 - clz(((((Min(Max(opt->us_timeout_period, MIN_US_TIMEOUT_PERIOD_RCSYS), MAX_US_TIMEOUT_PERIOD_RCSYS) * 00144 AVR32_SCIF_RCOSC_FREQUENCY + 500000) / 1000000) << 1) - 1) >> 1) - 1) << 00145 AVR32_WDT_CTRL_PSEL_OFFSET) | 00146 ((32 - clz(((((Min(Max(opt->us_timeban_period, MIN_US_TIMEBAN_PERIOD_RCSYS), MAX_US_TIMEBAN_PERIOD_RCSYS) * 00147 AVR32_SCIF_RCOSC_FREQUENCY + 500000) / 1000000) << 1) - 1) >> 1) - 1) << 00148 AVR32_WDT_CTRL_TBAN_OFFSET)); 00149 } 00150 else 00151 { 00152 // Set the CTRL.EN bit 00153 // Translate the us timeout to fit in CTRL.PSEL using the formula Twdt = 2pow(PSEL+1) / fROSC32K 00154 // Translate the us timeban to fit in CTRL.PSEL using the formula Twdt = 2pow(PSEL+1) / fROSC32K 00155 wdt_set_ctrl(AVR32_WDT_CTRL_EN_MASK | AVR32_WDT_CTRL_CEN_MASK | 00156 (opt->dar << AVR32_WDT_CTRL_DAR_OFFSET) | 00157 (opt->mode << AVR32_WDT_CTRL_MODE_OFFSET) | 00158 (opt->sfv << AVR32_WDT_CTRL_SFV_OFFSET) | 00159 (opt->fcd << AVR32_WDT_CTRL_FCD_OFFSET) | 00160 (opt->cssel << AVR32_WDT_CTRL_CSSEL_OFFSET) | 00161 ((32 - clz(((((Min(Max(opt->us_timeout_period, MIN_US_TIMEOUT_PERIOD_OSC32K), MAX_US_TIMEOUT_PERIOD_OSC32K) * 00162 AVR32_SCIF_OSC32_FREQUENCY + 500000) / 1000000) << 1) - 1) >> 1) - 1) << 00163 AVR32_WDT_CTRL_PSEL_OFFSET) | 00164 ((32 - clz(((((Min(Max(opt->us_timeout_period, MIN_US_TIMEBAN_PERIOD_OSC32K), MAX_US_TIMEBAN_PERIOD_OSC32K) * 00165 AVR32_SCIF_OSC32_FREQUENCY + 500000) / 1000000) << 1) - 1) >> 1) - 1) << 00166 AVR32_WDT_CTRL_TBAN_OFFSET)); 00167 } 00168 // Return the actual wdt period in us. 00169 return wdt_get_us_timeout_period(opt); 00170 }
long long wdt_get_us_timeban_period | ( | wdt_opt_t * | opt | ) |
Gets the timeban period of the WatchDog Timer in microseconds.
opt | Structure for settings of WDT. |
<0 | The WatchDog Timer is disabled. | |
>=0 | Active timeban period of the WatchDog Timer in microseconds. |
Definition at line 88 of file wdt4.c.
References wdt_opt_t::cssel, and WDT_CLOCK_SOURCE_SELECT_RCSYS.
00089 { 00090 // RCOSC 00091 if (opt->cssel == WDT_CLOCK_SOURCE_SELECT_RCSYS) 00092 { 00093 // Read CTRL.PSEL and translate it into us. 00094 return (AVR32_WDT.ctrl & AVR32_WDT_CTRL_EN_MASK) ? 00095 ((1ULL << (((AVR32_WDT.ctrl & AVR32_WDT_CTRL_TBAN_MASK) >> AVR32_WDT_CTRL_TBAN_OFFSET) + 1)) * 00096 1000000 + AVR32_SCIF_RCOSC_FREQUENCY / 2) / AVR32_SCIF_RCOSC_FREQUENCY : 00097 -1ULL; 00098 } 00099 else 00100 { 00101 // Read CTRL.PSEL and translate it into us. 00102 return (AVR32_WDT.ctrl & AVR32_WDT_CTRL_EN_MASK) ? 00103 ((1ULL << (((AVR32_WDT.ctrl & AVR32_WDT_CTRL_TBAN_MASK) >> AVR32_WDT_CTRL_TBAN_OFFSET) + 1)) * 00104 1000000 + AVR32_SCIF_OSC32_FREQUENCY / 2) / AVR32_SCIF_OSC32_FREQUENCY : 00105 -1ULL; 00106 } 00107 }
long long wdt_get_us_timeout_period | ( | wdt_opt_t * | opt | ) |
Gets the time-out period of the WatchDog Timer in microseconds.
opt | Structure for settings of WDT. |
<0 | The WatchDog Timer is disabled. | |
>=0 | Active time-out period of the WatchDog Timer in microseconds. |
Definition at line 67 of file wdt4.c.
References wdt_opt_t::cssel, and WDT_CLOCK_SOURCE_SELECT_RCSYS.
Referenced by wdt_enable().
00068 { 00069 // RCOSC 00070 if (opt->cssel == WDT_CLOCK_SOURCE_SELECT_RCSYS) 00071 { 00072 // Read CTRL.PSEL and translate it into us. 00073 return (AVR32_WDT.ctrl & AVR32_WDT_CTRL_EN_MASK) ? 00074 ((1ULL << (((AVR32_WDT.ctrl & AVR32_WDT_CTRL_PSEL_MASK) >> AVR32_WDT_CTRL_PSEL_OFFSET) + 1)) * 00075 1000000 + AVR32_SCIF_RCOSC_FREQUENCY / 2) / AVR32_SCIF_RCOSC_FREQUENCY : 00076 -1ULL; 00077 } 00078 else 00079 { 00080 // Read CTRL.PSEL and translate it into us. 00081 return (AVR32_WDT.ctrl & AVR32_WDT_CTRL_EN_MASK) ? 00082 ((1ULL << (((AVR32_WDT.ctrl & AVR32_WDT_CTRL_PSEL_MASK) >> AVR32_WDT_CTRL_PSEL_OFFSET) + 1)) * 00083 1000000 + AVR32_SCIF_OSC32_FREQUENCY / 2) / AVR32_SCIF_OSC32_FREQUENCY : 00084 -1ULL; 00085 } 00086 }
void wdt_reenable | ( | void | ) |
Re-enables the WatchDog Timer with the last time-out period configured.
Definition at line 173 of file wdt4.c.
References wdt_set_ctrl().
Referenced by wdt_scheduler().
00174 { 00175 wdt_set_ctrl(AVR32_WDT.ctrl | AVR32_WDT_CTRL_EN_MASK | AVR32_WDT_CTRL_CEN_MASK ); 00176 }
void wdt_reset_mcu | ( | void | ) |
Resets the MCU with the WatchDog Timer as fast as possible.
Definition at line 185 of file wdt4.c.
References wdt_enable().
00186 { 00187 Disable_global_interrupt(); 00188 // Enable the WDT with a 0s period (fastest way to get a Watchdog reset). 00189 wdt_enable(0); 00190 while (1); 00191 }
static void wdt_set_ctrl | ( | unsigned long | ctrl | ) | [static] |
Sets the WatchDog Timer Control register to the ctrl value thanks to the WatchDog Timer key.
ctrl | Value to set the WatchDog Timer Control register to. |
Definition at line 60 of file wdt4.c.
Referenced by wdt_disable(), wdt_enable(), and wdt_reenable().
00061 { 00062 AVR32_WDT.ctrl = ctrl | (AVR32_WDT_KEY_VALUE << AVR32_WDT_CTRL_KEY_OFFSET); 00063 AVR32_WDT.ctrl = ctrl | ((unsigned long) (~AVR32_WDT_KEY_VALUE << AVR32_WDT_CTRL_KEY_OFFSET) & AVR32_WDT_CTRL_KEY_MASK); 00064 }