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00046 #ifndef _PM_UC3C_H_
00047 #define _PM_UC3C_H_
00048
00049 #define _PM_UC3C_H_
00050
00051 #ifdef __cplusplus
00052 extern "C" {
00053 #endif
00054
00055 #include <avr32/io.h>
00056 #include "compiler.h"
00057
00058
00059 #ifdef AVR32_PM_410_H_INCLUDED
00060
00061 #define AVR32_PM_UNLOCK_KEY_VALUE 0x000000AA
00062 #endif
00063
00065 #if ( defined (__GNUC__) && ( defined (__AVR32_UC3C064C__) || defined (__AVR32_UC3C0128C__) || defined (__AVR32_UC3C0256C__) || defined (__AVR32_UC3C0512CREVC__) || defined (__AVR32_UC3C164C__) || defined (__AVR32_UC3C1128C__) || defined (__AVR32_UC3C1256C__) || defined (__AVR32_UC3C1512CREVC__) || defined (__AVR32_UC3C264C__) || defined (__AVR32_UC3C2128C__) || defined (__AVR32_UC3C2256C__) || defined (__AVR32_UC3C2512CREVC__))) \
00066 ||( defined (__ICCAVR32__) && ( defined (__AT32UC3C064C__) || defined (__AT32UC3C0128C__) || defined (__AT32UC3C0256C__) || defined (__AT32UC3C0512C__) || defined (__AT32UC3C164C__) || defined (__AT32UC3C1128C__) || defined (__AT32UC3C1256C__) || defined (__AT32UC3C1512C__) || defined (__AT32UC3C264C__) || defined (__AT32UC3C2128C__) || defined (__AT32UC3C2256C__) || defined (__AT32UC3C2512C__)))
00067
00068
00070 typedef enum
00071 {
00072 PM_CLK_SRC_SLOW = AVR32_PM_MCSEL_SLOW,
00073 PM_CLK_SRC_OSC0 = AVR32_PM_MCSEL_OSC0,
00074 PM_CLK_SRC_OSC1 = AVR32_PM_MCSEL_OSC1,
00075 PM_CLK_SRC_PLL0 = AVR32_PM_MCSEL_PLL0,
00076 PM_CLK_SRC_PLL1 = AVR32_PM_MCSEL_PLL1,
00077 PM_CLK_SRC_RC8M = AVR32_PM_MCSEL_RCOSC8,
00078 PM_CLK_SRC_RCRIPOSC = AVR32_PM_MCSEL_CRIPOSC,
00079 PM_CLK_SRC_RC120M = AVR32_PM_MCSEL_RC120M,
00080 PM_CLK_SRC_INVALID
00081 } pm_clk_src_t;
00082
00084 typedef enum
00085 {
00086 PM_CLK_DOMAIN_0 = AVR32_PM_CLK_GRP_CPU,
00087 PM_CLK_DOMAIN_1 = AVR32_PM_CLK_GRP_HSB,
00088 PM_CLK_DOMAIN_2 = AVR32_PM_CLK_GRP_PBA,
00089 PM_CLK_DOMAIN_3 = AVR32_PM_CLK_GRP_PBB,
00090 PM_CLK_DOMAIN_4 = AVR32_PM_CLK_GRP_PBC,
00091 PM_CLK_DOMAIN_INVALID
00092 } pm_clk_domain_t;
00093
00094
00096 typedef enum
00097 {
00098 PM_CKSEL_DIVRATIO_2 = 0,
00099 PM_CKSEL_DIVRATIO_4,
00100 PM_CKSEL_DIVRATIO_8,
00101 PM_CKSEL_DIVRATIO_16,
00102 PM_CKSEL_DIVRATIO_32,
00103 PM_CKSEL_DIVRATIO_64,
00104 PM_CKSEL_DIVRATIO_128,
00105 PM_CKSEL_DIVRATIO_256
00106 } pm_divratio_t;
00107
00108 #endif
00109
00111 #define PM_POLL_TIMEOUT 100000
00112
00114 #define PM_NOT_SUPPORTED (-10000)
00115
00116
00118 #define PM_UNLOCK(reg) (AVR32_PM.unlock = (unsigned long)(AVR32_PM_UNLOCK_KEY_VALUE << AVR32_PM_UNLOCK_KEY_OFFSET)|(reg))
00119
00120
00123
00124
00136 extern long pm_set_mclk_source(pm_clk_src_t src);
00137
00152 extern long pm_config_mainclk_safety(bool cfd, bool final);
00153
00166 extern long pm_set_clk_domain_div(pm_clk_domain_t clock_domain, pm_divratio_t divratio);
00167
00179 extern long pm_disable_clk_domain_div(pm_clk_domain_t clock_domain);
00180
00190 extern long pm_wait_for_clk_ready(void);
00191
00193
00194
00197
00198
00209 extern long pm_enable_module(unsigned long module);
00210
00221 extern long pm_disable_module(unsigned long module);
00222
00223
00225
00228
00229
00237 #define pm_sleep(sleep_mode) {__asm__ __volatile__ ("sleep "STRINGZ(sleep_mode));}
00238
00245 #define SLEEP(mode) pm_sleep(mode)
00246
00252 #if defined (__GNUC__)
00253 __attribute__((__always_inline__))
00254 #endif
00255 extern __inline__ unsigned long pm_get_wake_cause(void)
00256 {
00257 return AVR32_PM.wcause;
00258 }
00259
00266 #if defined (__GNUC__)
00267 __attribute__((__always_inline__))
00268 #endif
00269 extern __inline__ void pm_asyn_wake_up_enable(unsigned long awen_mask)
00270 {
00271 AVR32_PM.awen |= awen_mask;
00272 }
00273
00280 #if defined (__GNUC__)
00281 __attribute__((__always_inline__))
00282 #endif
00283 extern __inline__ void pm_asyn_wake_up_disable(unsigned long awen_mask)
00284 {
00285 AVR32_PM.awen &= ~awen_mask;
00286 }
00287
00289
00290
00291
00294
00295
00301 #if defined (__GNUC__)
00302 __attribute__((__always_inline__))
00303 #endif
00304 extern __inline__ unsigned long pm_get_reset_cause(void)
00305 {
00306 return AVR32_PM.rcause;
00307 }
00308
00310
00311
00312
00315
00316
00322 #if defined (__GNUC__)
00323 __attribute__((__always_inline__))
00324 #endif
00325 extern __inline__ void pm_enable_interrupts(unsigned long mask)
00326 {
00327 AVR32_PM.ier |= mask;
00328 }
00329
00335 #if defined (__GNUC__)
00336 __attribute__((__always_inline__))
00337 #endif
00338 extern __inline__ void pm_disable_interrupts(unsigned long mask)
00339 {
00340 AVR32_PM.idr |= mask;
00341 }
00342
00347 #if defined (__GNUC__)
00348 __attribute__((__always_inline__))
00349 #endif
00350 extern __inline__ unsigned long pm_get_enabled_interrupts(void)
00351 {
00352 return(AVR32_PM.imr);
00353 }
00354
00359 #if defined (__GNUC__)
00360 __attribute__((__always_inline__))
00361 #endif
00362 extern __inline__ unsigned long pm_get_interrupts_status(void)
00363 {
00364 return(AVR32_PM.isr);
00365 }
00366
00371 #if defined (__GNUC__)
00372 __attribute__((__always_inline__))
00373 #endif
00374 extern __inline__ void pm_clear_interrupt_status(unsigned long mask)
00375 {
00376 AVR32_PM.icr |= mask;
00377 }
00378
00380
00381
00382
00385
00386
00391 #if defined (__GNUC__)
00392 __attribute__((__always_inline__))
00393 #endif
00394 extern __inline__ unsigned long pm_get_status(void)
00395 {
00396 return AVR32_PM.sr;
00397 }
00398
00400
00401 #ifdef __cplusplus
00402 }
00403 #endif
00404
00405 #endif // _PM_UC3C_H_