USB

AP7200 supports USB 2.0 Host (including high speed) in addition to a USB 2.0 OTG port (also with high speed capabilities).

Schematics

The following schematics show the connection of each USB on STK1005. Please refer the AP7200 data sheet for details on how to connect the USB interface to AP7200 in your design.

Image:STK1002USBSch.gif

The capacitors C57 and C58 are not mounted on the circuit board. The footprints are meant to be used for testing of the USB interface on AP7200. R4, R5, C57 and C58 are mounted as close to AP7000 as possible and C57 and C58 are placed such that no stubs are introduced on the transmission line.

Signals

SignalDescription
FSDPFull Speed Differential Plus
FSDMFull Speed Differential Minus
HSDPHigh Speed Differential Plus
HSDMHigh Speed Differential Minus
VBGBand Gap Voltage

Please refer the AP7200 data sheet for a guideline on how to route USB signals.

Intel has also released a High Speed USB Platform Design Guidelines with good information about routing.

Jumpers

For correct operation of the USB peripherals a few control signals must be connected. For USB host these are the VBUS generation and over current flag. (see *1 on figure above).

For USB OTG the signals are VBUS generation (VBOF) and USB_ID (for OTG roll determination) (*2 on figure above)

These signals can be connected to the appropriate port by placing jumpers on the specified headers, or strapped to alternative ports if GCLK4/EXTINT4 (for host) or DMA1 (for otg) is used.