Description

OpenCores Reference Platform 2 (OCRP-2) is full-size length add-in PCI board. It includes two FPGA chips, video D/A and A/D converters, SDRAM memory, FLASH memory, PLD chip, USB, EIA232 and Ethernet PHY chips. It is designed for a debugging and verification process for several of our cores. See a block diagram for details.

One special function of this board is to provide a method for a remote test of cores. The board will be used via web based interface. It will be possible to download design to the board and use a JAVA based logic analyzer and signal generator to debug a particular core. This interface will be similar to Hewlett Packard's 16550 Logic Analyzer which is possible to be used remotely via X session.

Second possible use is to use it as a stand alone board. FPGAs are loaded via PC's printer port with centronics cable and external power supply must be provided.

It is designed to be used as a base platform to port Linux, RTEMS and eCos operating systems to OpenRISC architecture and to write device drivers for our peripheral cores.

Picture 1: Block diagaram

Current Status

• preliminary design schematic is available as Adobe PDF document ~125 kb
• or as Protel schematics ~100 kb
• currently working on PCI interface and FPGAs configuration schematics
• the design files will be updated in the following days

Acknowledgments

• thanks to all those who showed interest in the design so far, providing also support with new ideeas and links to component datasheets;
• special thanks to Woody Johnson for his guidelines and hints regarding the Ethernet design part;
• special thanks to Wayne Mitzen for his kind support with hints and tips in designing with Protel99.

Maintainer/Author:

Ovidiu Lupas

Mailing-list:

cores@opencores.org_NOSPAM